STM8S105S4T6C

STM8S105C4/6 STM8S105K4/6 STM8S105S4/6 Access line, 16 MHz STM8S 8-bit MCU, up to 32 Kbyte Flash, integrated EEPROM, 10-bit ADC, timers, UART, SPI, IC Datasheet - production data Features Core 16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline LQFP48 (7x7 mm) LQFP44 (10x10 mm) LQFP32 (7x7 mm) Extended instruction set Memories Program memory: up to 32 Kbyte Flash data retention 20 years at 55 C after 10 kcycle UFQFPN32 (5x5 mm) SDIP32 400ml Data memory: up to 1 Kbyte true data 2x16-bit general purpose timer, with 2+3 EEPROM endurance 300 kcycle CAPCOM channels (IC, OC or PWM) RAM: up to 2 Kbyte 8-bit basic timer with 8-bit prescaler Clock, reset and supply management Auto wake-up timer 2.95 to 5.5 V operating voltage Window watchdog and independent watchdog timers Flexible clock control, 4 master clock sources Low power crystal resonator oscillator Communication interfaces External clock input UART with clock output for synchronous Internal, user-trimmable 16 MHz RC operation, SmartCard, IrDA, LIN master mode Internal low-power 128 kHz RC SPI interface up to 8 Mbit/s Clock security system with clock monitor I2C interface up to 400 kbit/s Power management: Low-power modes (wait, active-halt, halt) Analog to digital converter (ADC) Switch-off peripheral clocks individually 10-bit, 1 LSB ADC with up to 10 multiplexed Permanently active, low-consumption power- channels, scan mode and analog watchdog on and power-down reset I/Os Interrupt management Up to 38 I/Os on a 48-pin package including Nested interrupt controller with 32 interrupts 16 high sink outputs Up to 37 external interrupts on 6 vectors Highly robust I/O design, immune against current injection Timers Unique ID Advanced control timer: 16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time 96-bit unique key for each device insertion and flexible synchronization September 2015 DocID14771 Rev 15 1/121 This is information on a product in full production. www.st.comContents STM8S105x4/6 Contents 1 Introduction 9 2 Description 10 3 Block diagram . 12 4 Product overview 13 4.1 Central processing unit STM8 . 13 4.2 Single wire interface module (SWIM) and debug module (DM) 14 4.3 Interrupt controller 14 4.4 Flash program and data EEPROM memory . 14 4.5 Clock controller . 16 4.6 Power management . 17 4.7 Watchdog timers . 17 4.8 Auto wakeup counter 18 4.9 Beeper . 18 4.10 TIM1 - 16-bit advanced control timer 18 4.11 TIM2, TIM3 - 16-bit general purpose timers . 18 4.12 TIM4 - 8-bit basic timer . 19 4.13 Analog-to-digital converter (ADC1) . 19 4.14 Communication interfaces 20 4.14.1 UART2 20 4.14.2 SPI . 21 2 4.14.3 I C . 21 5 Pinout and pin description . 22 5.1 Alternate function remapping 30 6 Memory and register map 31 6.1 Memory map 31 6.2 Register map 32 6.2.1 I/O port hardware register map . 32 6.2.2 General hardware register map . 34 2/121 DocID14771 Rev 15