ST7FLITE19F1M6

ST7LITE1 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 4 TIMERS, SPI Memories 4 Kbytes single voltage extended Flash (XFlash) Program memory with read-out pro- tection, In-Circuit Programming and In-Appli- cation programming (ICP and IAP). 10K write/ SO20 erase cycles guaranteed, data retention: 20 years at 55C. 256 bytes RAM 1 realtime base and 1 input capture 2 128 bytes data E PROM with read-out protec- One 12-bit Auto-reload Timer with 4 PWM tion. 300K write/erase cycles guaranteed, outputs, input capture and output compare data retention: 20 years at 55C. functions Clock, Reset and Supply Management Communication Interface Enhanced reset system SPI synchronous serial interface Enhanced low voltage supervisor (LVD) for Interrupt Management main supply and an auxiliary voltage detector 10 interrupt vectors plus TRAP and RESET (AVD) with interrupt capability for implement- ing safe power-down procedures 15 external interrupt lines (on 4 vectors) Clock sources: Internal 1% RC oscillator (on A/D Converter some devices), crystal/ceramic resonator or 7 input channels external clock Fixed gain Op-amp Internal 32-MHz input clock for Auto-reload 13-bit precision for 0 to 430 mV ( 5V V ) timer DD 10-bit precision for 430 mV to 5V ( 5V V ) Optional x4 or x8 PLL for 4 or 8 MHz internal DD clock Instruction Set Five Power Saving Modes: Halt, Active-Halt, 8-bit data manipulation Auto Wake-up from Halt, Wait and Slow 63 basic instructions with illegal opcode de- I/O Ports tection Up to 15 multifunctional bidirectional I/O lines 17 main addressing modes 7 high sink outputs 8 x 8 unsigned multiply instructions 4 Timers Development Tools Configurable watchdog timer Full hardware/software development package Two 8-bit Lite Timers with prescaler, DM (Debug Module) Device Summary Features ST7LITE10 ST7LITE15 ST7LITE19 Program memory - bytes 4K RAM (stack) - bytes 256 (128) Data EEPROM - bytes - - 128 Lite Timer with Watchdog, Lite Timer with Watchdog, Peripherals Autoreload Timer, SPI, Autoreload Timer with 32-MHz input clock, 10-bit ADC with Op-Amp SPI, 10-bit ADC with Op-Amp Operating Supply 2.4V to 5.5V Up to 8Mhz Up to 8Mhz (w/ ext OSC up to 16MHz CPU Frequency (w/ ext OSC up to 16MHz) and int 1MHz RC 1% PLLx8/4MHz) Operating Temperature -40C to +85C Packages SO20 300 Rev. 2.0 December 2004 1/131 1Table of Contents 1 INTRODUCTION 5 2 PIN DESCRIPTION 6 3 REGISTER & MEMORY MAP . 10 4 FLASH PROGRAM MEMORY 13 4.1 INTRODUCTION . 13 4.2 MAIN FEATURES 13 4.3 PROGRAMMING MODES 13 4.4 ICC INTERFACE . 14 4.5 MEMORY PROTECTION 15 4.6 RELATED DOCUMENTATION 15 4.7 REGISTER DESCRIPTION . 15 5 DATA EEPROM . 16 5.1 INTRODUCTION . 16 5.2 MAIN FEATURES 16 5.3 MEMORY ACCESS . 17 5.4 POWER SAVING MODES . 19 5.5 ACCESS ERROR HANDLING 19 5.6 DATA EEPROM READ-OUT PROTECTION . 19 5.7 REGISTER DESCRIPTION . 20 6 CENTRAL PROCESSING UNIT . 21 6.1 INTRODUCTION . 21 6.2 MAIN FEATURES 21 6.3 CPU REGISTERS 21 7 SUPPLY, RESET AND CLOCK MANAGEMENT 24 7.1 INTERNAL RC OSCILLATOR ADJUSTMENT 24 7.2 PHASE LOCKED LOOP . 24 7.3 REGISTER DESCRIPTION . 25 7.4 MULTI-OSCILLATOR (MO) . 27 7.5 RESET SEQUENCE MANAGER (RSM) . 28 7.6 SYSTEM INTEGRITY MANAGEMENT (SI) 30 8 INTERRUPTS . 35 8.1 NON MASKABLE SOFTWARE INTERRUPT . 35 8.2 EXTERNAL INTERRUPTS . 35 8.3 PERIPHERAL INTERRUPTS . 35 9 POWER SAVING MODES . 39 9.1 INTRODUCTION . 39 9.2 SLOW MODE . 39 9.3 WAIT MODE 40 9.4 HALT MODE 41 9.5 ACTIVE-HALT MODE . 42 131 9.6 AUTO WAKE UP FROM HALT MODE 43 10 I/O PORTS . 47 2/131 1