Product Information

ISL98001CQZ-170

ISL98001CQZ-170 electronic component of Renesas

Datasheet
Analog Front End - AFE ISL98001CQZ TRPL VID DIGIZER W/DIGTL PLL

Manufacturer: Renesas
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

17: USD 25.0128 ea
Line Total: USD 425.22

0 - Global Stock
MOQ: 17  Multiples: 17
Pack Size: 17
Availability Price Quantity
0 - Global Stock


Ships to you between Fri. 26 Apr to Thu. 02 May


Multiples : 660

0 - Global Stock


Ships to you between Fri. 26 Apr to Thu. 02 May

MOQ : 17
Multiples : 17
17 : USD 25.0128

     
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RoHS - XON
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DATASHEET ISL98001 FN6148 Rev 5.00 Triple Video Digitizer with Digital PLL September 21, 2010 The ISL98001 3-Channel, 8-bit Analog Front-End (AFE) Features contains all the functions necessary to digitize analog YPbPr 140MSPS, 170MSPS, 210MSPS, and 275MSPS video signals and RGB graphics signals from DVD players, maximum conversion rates digital VCRs, video set-top boxes, and personal computers. This product familys conversion rates support HDTV Glitchless Macrovision-compliant sync separator resolutions up to 1080p and PC monitor resolutions up to Extremely fast recovery from VCR head switching UXGA and QXGA, while the front end s programmable input Low PLL clock jitter (250ps 170MSPS) bandwidth ensures sharp, clear images at all resolutions. P-P 64 intrapixel sampling positions To maximize performance with the widest variety of video sources, the ISL98001 features a fast-responding digital PLL 0.35V to 1.4V video input range P-P P-P (DPLL), providing extremely low jitter with PC graphics signals Programmable bandwidth (100MHz to 780MHz) and quick recovery from VCR head switching with video signals. Integrated HSYNC and SOG processing eliminate the 2-channel input multiplexer need for external slicers, sync separators, Schmitt triggers, RGB 4:4:4 and YUV 4:2:2 output formats and filters. 5 embedded voltage regulators allow operation from Glitchless, automatic Macrovision-compliance is obtained single 3.3V supply and enhance performance, isolation by a digital Macrovision detection function that detects and Completely independent 8-bit gain/10-bit offset control automatically removes Macrovision from the HSYNC signal. Pb-free (RoHS compliant) Ease-of-use is also emphasized with features such as the elimination of PLL charge pump current/VCO range Applications programming and single-bit switching between RGB and Digital TVs YPbPr signals. Automatic Black Level Compensation (ABLC) eliminates part-to-part offset variation, ensuring perfect black Projectors level performance in every application. Multifunction monitors The ISL98001 is fully backwards compatible (hardware and Digital KVM software) with the X980xx family of AFEs. RGB graphics processing Simplified Block Diagram OFFSET VOLTAGE ABLC DAC CLAMP 3 RGB/YPbPr 1 8 OR 16 IN 8-BIT ADC PGA RGB/YUV + 3 OUT RGB/YPbPr 2 IN x3 HSYNC OUT VSYNC OUT SOG 1/2 IN HS OUT SYNC HSYNC 1/2 DIGITAL PLL IN PROCESSING PIXELCLK OUT VSYNC 1/2 IN AFE CONFIGURATION AND CONTROL FN6148 Rev 5.00 Page 1 of 31 September 21, 2010ISL98001 Ordering Information MAXIMUM TEMPERATURE PART NUMBER PIXEL RATE RANGE PACKAGE PKG. (Note) (MHz) (C) (Pb-free) DWG. ISL98001IQZ-140 140 -40 to +85 128 MQFP MDP0055 ISL98001CQZ-140 140 0 to +70 128 MQFP MDP0055 ISL98001CQZ-170 170 0 to +70 128 MQFP MDP0055 ISL98001CQZ-210 210 0 to +70 128 MQFP MDP0055 ISL98001CQZ-275 275 0 to +70 128 MQFP MDP0055 NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Block Diagram V CLAMP 10 OFFSET ABLC DAC R 1 IN V + IN 8 R 7:0 P 8 8-BIT ADC PGA + V - IN 8 R 2 R 7:0 IN S V CLAMP 10 OFFSET ABLC DAC G 1 IN V + IN 8 RGB 1 GND G 7:0 P 8 8-BIT ADC PGA + 8 V - IN G 7:0 G 2 S IN RGB 2 GND V CLAMP OFFSET 10 ABLC DAC B 1 IN V + IN 8 B 7:0 P 8 8-BIT ADC PGA + 8 V - IN B 7:0 S B 2 IN DATACLK SOG 1 IN DATACLK SOG 2 IN HSYNC 1 IN SYNC AFE CONFIGURATION HS OUT PROCESSING AND CONTROL HSYNC 2 IN VSYNCIN1 VS OUT VSYNC 2 IN HSYNC OUT VSYNC OUT CLOCKINV DIGITAL PLL XTAL IN XCLK OUT XTAL OUT SCL SERIAL SDA INTERFACE SADDR FN6148 Rev 5.00 Page 2 of 31 September 21, 2010 OUTPUT DATA FORMATTER

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
CEL (RENESAS)
ID4
IDT
IDT, Integrated Device Technology Inc
INTEGRATED DEVICE
INTEGRATED DEVICE TECHNOLOGY
INTEGRATED DEVICES TECH AID
Intersil
INTERSIL - FGC
Intersil(Renes as Electronics)
Intersil(Renesas Electronics)
ITS
REA
RENESAS
RENESAS (IDT)
RENESAS (INTERSIL)
Renesas / IDT
Renesas / Intersil
Renesas Electronics
Renesas Electronics America
RENESAS TECHNOLOGY

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