Product Information

MC100EP445FAG

MC100EP445FAG electronic component of ON Semiconductor

Datasheet
Serial to Parallel Logic Converters 3.3V/5V ECL 8-Bit Serial to Parallel

Manufacturer: ON Semiconductor
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 35.9835 ea
Line Total: USD 35.9835

234 - Global Stock
Ships to you between
Thu. 11 Apr to Mon. 15 Apr
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
234 - Global Stock


Ships to you between Thu. 11 Apr to Mon. 15 Apr

MOQ : 1
Multiples : 1

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MC100EP445FAG
ON Semiconductor

1 : USD 35.9835
10 : USD 33.189
25 : USD 31.694
50 : USD 27.048
100 : USD 27.0365
250 : USD 25.6105
500 : USD 25.576
1000 : USD 25.5415
2500 : USD 25.507

     
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MC10EP445, MC100EP445 3.3V/5VECL 8-Bit Serial/Parallel Converter Description The MC10/100EP445 is an integrated 8bit differential serial to parallel data converter with asynchronous data synchronization. The MC10EP445, MC100EP445 V SINA SINA V V SINB SINB SINSEL CC BB0 EE 32 31 30 29 28 27 26 25 RESET 24 1 V CC SYNC 23 2 PCLK CKEN 22 3 PCLK CLK 21 4 Q0 MC10EP445 CLK 20 MC100EP445 5 V CC V 6 19 Q1 BB1 7 18 Q2 CKSEL V CC 17 8 V CC 9 10 11 12 13 14 15 16 Q7 Q6 Q5 V V Q4 Q3 V CC CC EE Warning: All V and V pins must be externally connected to CC EE Power Supply to guarantee proper operation. Figure 1. 32Lead LQFP Pinout (Top View) Table 1. PIN DESCRIPTION Exposed Pad Pin Function (EP) SINA*, SINA* ECL Differential Serial Data Input A V SINA SINA V V SINB SINB SINSEL CC BB0 EE SINB*, SINB* ECL Differential Serial Data Input B 32 31 30 29 28 27 26 25 SINSEL* ECL Serial Input Selector Pin RESET 1 V 24 CC Q0Q7 ECL Parallel Data Outputs SYNC PCLK 2 23 CLK*, CLK* ECL Differential Clock Inputs CKEN 22 3 PCLK PCLK, PCLK ECL Differential Parallel Clock Output SYNC* ECL Conversion Synchronizing Input CLK 4 21 Q0 MC10EP445 CKSEL* ECL Clock Input Selector Pin CLK 5 20 MC100EP445 V CC CKEN* ECL Clock Enable Pin 6 19 Q1 V BB1 RESET* ECL Reset Pin 7 18 Q2 CKSEL V , V Output Reference Voltage BB0 BB1 8 17 V V Positive Supply V CC CC CC 9 10 11 12 13 14 15 16 V Negative Supply EE Q7 Q6 Q5 V V Q4 Q3 V EP The exposed pad (EP) on the QFN32 CC CC EE package bottom is thermally connected to the die for improved heat transfer out of the package. THe exposed pad must be attached to a heatsinking conduit. Figure 2. 32Lead QFN Pinout (Top View) The pad is electrically connected to V . EE * Pins will default logic LOW or differential logic LOW when left open.

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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