QorIQ Multicore Processor Development P3041 Development System development and performance evaluation The P3041DS offers significant flexibility in before the customers board is ready. allocating its 18 SerDes lanes to various functions. Its base configuration supports The P3041 processor is based upon the two RGMII ports, two PCI Express x4 slots e500mc core, built on Power Architecture (two lanes per slot), a x4 slot for Freescales technology, offering speeds of 12001500 optional SGMII-PEX-RISER, a x4 slot for MHz. It has a three-level cache hierarchy with Freescales optional XAUI-RISER, the Aurora 32 KB of instruction and data cache per core, high-speed debug port and two SATA ports. 128 KB of unified backside L2 cache per It can also be configured to support up to four core and 1 MB of shared frontside CoreNet PCI Express slots of widths up to x8. Overview platform cache fronting the memory controller. I/Os include 18 SerDes lanes running at up to The P3041DS memory system supports The P3041DS is a flexible development 5 GHz, multiplexed across four PCI Express 2 GB of DDR3 at 1333 MHz. It has 128 MB of system supporting the quad-core P3041 2 Gen2 controllers, one 10 gigabit Ethernet (GE) NOR flash, 1 GB of NAND flash, a 256 KB I C device. With its 1.5 GHz P3041 and rich XAUI interface, four 1 GE SGMII interfaces, EEPROM as well as 16 MB of flash and 128 input/output (I/O) mix, the board is intended four 2.5 Gbps SGMII interfaces, two Serial KB EEPROM of SPI-based memory. It also for development of P3041 in networking and RapidIO (version 1.3 with features of version includes two USB 2.0 receptacles and an SD Ethernet-centric applications, such as control 2.1) interfaces, two SATA 2.0 interfaces and card slot. plane and mixed control plane/data plane the high-speed Aurora debug interface. It has in switches, routers, base station network The P3041DS is pre-loaded with an a 64-bit DDR3 and DDR3L (low power) DRAM interface cards, aerospace and defense and Embedded Linux Essentials for QorIQ interface with 8-bit ECC support running at factory automation. Processors with Data Path Acceleration a data rate up to 1333 MHz. It includes two development kit. This kit includes a 2.6.x.x The P3041DS can help shorten your time USB 2.0 interfaces (including PHY), two dual SMP Linux kernel, hugetlbfs for applications to market. The board, which exercises universal asynchronous receiver/transmitters with a large memory footprint, user space most capabilities of the device, can serve (DUARTs), an SD/MMC interface, a 32-bit DPAA for high-performance packet handling, as a reference for the customers hardware 2 local bus, four I C and SPI. It also includes the u-boot, the GCC tool chain and Mentor development. It can also be used as a accelerator blocks collectively known as the System Builder, among many other features. debug tool to check behaviors on the Data Path Acceleration Architecture (DPAA) board compared to behaviors seen on that offload various tasks from the core, customer boards. It can be used for software including routine packet handling, security algorithm calculation and pattern matching. P3041DS P3041DS Control Board JTAG Set Secondary PSes Control: COP Legacy Connection Switches, Three Power Pools Supported by Three 2 I C RST Center Independent, Programmable Regulations System Flash/RCW, RTC/PWR Center/ 3 Control VDD CA Regulators Thermometer Monitor Logic P3041 VDD CB FPGA Platform Serdes ATX PS DDR3 DDR3 Regulator 1.5v/1.35v DDR3 DIMM 8-bit Local Bus 16/8-bit x2 Bank1 0, 1 SPI 16-bit SPI Flash Slot 7 PCIe 1 x2/x4/x8 or SRIO2 x4 x2 PromJet Emulator MMC 4/8-bit SD/MMC Bank1 2, 3 USB x2 Slot 4 16-bit PCIe 3 x2 x2 USB 2.0 NOR Flash Bank1 4, 5 x2 PCIe 2 x2/x4 or SRIO1 x4 or SRIO2 x2 10/100/1G RGMII Slot 6 8-bit x2 or SGMII 1:2 or SGMII 1:4 NAND Flash Bank1 6, 7 SYS/PEX Clocks Slot 5 SRIO1 x2 or SGMII 3:4 DUART 2 x1 Slot 3 Slot 1 Bank1 8 PCIe 4 x1 or PCIe 2 x1 x2 Bank3 14, 15 SGMIII (1:4) or XAUI 1 or SGMII 5 Bank1 9 Aurora x2 Bank3 16, 17 SATA 1/2 x4 Bank2 10, 11, PCIe 3 x1/x4 or SGMII 1:4 or XAUI 1 Slot 2 12, 13 Freescale Technology PCI Express DUART P3041DS Board Features S i x x 4 P C I E x p re s s s l o t s Tw o D U A R Ts Processor C a n s u p p o r t F re e s c a l e s X A U I - R I S E R a n d P 3 0 4 1 , 1 . 5 G H z c o re w i t h 1 3 3 3 M H z Debug SGMII-PEX-RISER option cards DDR3 data rate J TA G / C O P M u l t i p l e S y s C l k i n p u t s f o r g e n e r a t i n g SATA A u ro r a h i g h - s p e e d c o n n e c t o r various device frequencies Tw o v e r t i c a l S ATA c o n n e c t o r s Other Memory USB 2.0 I E E E 1588 connector for Symmetricom 2 G B u n b u ff e re d D D R 3 2 4 0 - p i n D I M M option card Tw o H i g h - S p e e d U S B c o n t ro l l e r s module with ECC (72-bit bus), 1333 MHz Te m p e r a t u re s e n s o r O n e Ty p e A a n d o n e M i c ro A B re c e p t a c l e data rate E i g h t g e n e r a l - p u r p o s e I / O s 1 2 8 M B N O R f l a s h Ethernet S u p p o r t s t w o 1 0 / 1 0 0 / 1 0 0 0 p o r t s w i t h n o 1 G B N A N D f l a s h add-in cards S P I - b a s e d 1 2 8 M B f l a s h d T S E C 4 a n d d T S E C 5 a s R G M I I t o V i t e s s e S P I - b a s e d 1 2 8 K B E E P R O M V S C 8 2 4 4 P H Y S D c o n n e c t o r t o i n t e r f a c e w i t h a n S D O p t i o n a l S G M I I - P E X - R I S E R e x p a n d s memory card 10/100/1000 port count to five 1 0 G E s u p p o r t e d w i t h o p t i o n a l X A U I - RISER card For more information, visit freescale.com/QorIQ Freescale, the Freescale logo and QorIQ are trademarks of FreescaleSemiconductor,Inc., Reg. U.S. Pat. & Tm. Off. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are trademarks and service marks licensed by Power.org. All other product or service names are the property of their respective owners. 2011FreescaleSemiconductor,Inc. Document Number: P3041DSFS / REV 0