Product Information

MC33689DPEW

Product Image X-ON

Datasheet
Interface - Specialized SYSTEM BASIS CHIP W/LIN
Manufacturer: NXP



Price (Ex GST)

From 6.4263

41 - Global Stock
Ships to you between
Wed. 19 May to Fri. 21 May

MOQ: 1 Multiples:1
Pack Size :   1
Availability Price Quantity
41 - Global Stock


Ships to you between Wed. 19 May to Fri. 21 May

MOQ : 1
Multiples : 1
1 : $ 10.3993
10 : $ 6.7895
25 : $ 6.4263

Buy
   
Manufacturer
NXP
Product Category
Interface - Specialized
RoHS - XON
Y Icon ROHS
Product Type
Interface - Specialized
Packaging
Tube
Brand
Nxp / Freescale
Factory Pack Quantity :
42
Subcategory
Interface Ics
Cnhts
8542319000
Hts Code
8542390001
Mxhts
85423901
Taric
8542399000
LoadingGif
Image
Mfr. Part No.
Description
Stock
NXP Freescale Interface - Specialized SYSTEM BASIS CHIP WLIN
583
Voltage Regulators - Switching Regulators SW MODE P/S W/ MULT REG
611
Battery Management Battery Cell Controller, Premium, 14 Channels, TPL, LQFP64, reel
27
Battery Management Battery Cell Controller, Advanced, 14 Channels, TPL, LQFP64, reel
107
CAN Interface IC SBC-E-HS-CAN
3822
Battery Management Battery Cell Controller, Generic B, 14 Channels, SPI, LQFP64, Reel
331
Battery Management MC33771BSP2AE/HLQFP64///TRAY MULTIPLE DP BAKEABLE
74
CAN 1Mbps Sleep/Standby/Stop 5V/9V/12V/15V/18V/24V 28-Pin SOIC W T/R
996
Image
Mfr. Part No.
Description
Stock
Interface - Specialized Dual Port Controller With Expanded I/Os 56-WQFN -40 to 85
408
Interface - Specialized 24-Input SensorMonit
1471
Interface - Specialized Smart Card Interface w/Serial Control
154
Interface - Specialized SBC-LITE-LS-CAN
26
Interface - Specialized DISTRIB SYS INTRFC
94

Document Number: MC33689 Freescale Semiconductor Rev. 8.0, 9/2012 Technical Data System Basis Chip with LIN 33689D Transceiver The 33689 is a serial peripheral interface (SPI) controlled system basis chip (SBC) that combines many frequently used functions in an MCU-based system plus a local interconnect network (LIN) SYSTEM BASIS CHIP WITH LIN transceiver. Applications include power window, mirror, and seat controls. The 33689 has a 5.0 V, 50 mA low dropout regulator with full protection and reporting features. The device provides full SPI- readable diagnostics and a selectable timing watchdog for detecting errant operation. The LIN transceiver waveshaping circuitry can be disabled for higher data rates. One 50 mA and two 150 mA high side switches with output protection are available to drive inductive or resistive loads. The 150 mA switches can be pulse-width modulated (PWM). Two high voltage inputs are available for contact monitoring or as external wake-up inputs. A current sense operational amplifier is EW SUFFIX (PB-FREE) available for load current monitoring. 98ARH99137A 32-PIN SOICW The 33689 has three operational modes: ? Normal (all functions available) ? Sleep (VDD OFF, wake-up via LIN bus or wake-up inputs) ? Stop (VDD ON, wake-up via MCU, LIN bus, or wake-up inputs) ORDERING INFORMATION Device Features Temperature (Add R2 Suffix for Tape Package Range (T ) ? Full-duplex SPI Interface at frequencies up to 4.0 MHz A and Reel) ? LIN transceiver capable to 100 kbps with waveshaping capability MC33689DPEW -40 ?C to 125 ?C 32 SOICW ?5.0 V low dropout regulator with full fault detection and protection ? One 50 mA and two 150 mA protected high side switches ? Current sense operational amplifier ? Compatible with LIN 2.0 specification package V V DD PWR 33689 VS1 HS3 VS2 L1 VCC 5.0 V L2 VDD WDC HS1 CS CS HS2 SCK SCLK MCU SPI MOSI MOSI MISO MISO E+ INT E- RST GND IN TGND OUT AGND TXD LIN BUS RXD Figure 1. 33689 Simplified Application Diagram Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as may be required, to permit improvements in the design of its products. ? Freescale Semiconductor, Inc., 2006-2012. All rights reserved.Document Number: MC33689 Freescale Semiconductor Rev. 8.0, 9/2012 Technical Data System Basis Chip with LIN 33689D Transceiver The 33689 is a serial peripheral interface (SPI) controlled system basis chip (SBC) that combines many frequently used functions in an MCU-based system plus a local interconnect network (LIN) SYSTEM BASIS CHIP WITH LIN transceiver. Applications include power window, mirror, and seat controls. The 33689 has a 5.0 V, 50 mA low dropout regulator with full protection and reporting features. The device provides full SPI- readable diagnostics and a selectable timing watchdog for detecting errant operation. The LIN transceiver waveshaping circuitry can be disabled for higher data rates. One 50 mA and two 150 mA high side switches with output protection are available to drive inductive or resistive loads. The 150 mA switches can be pulse-width modulated (PWM). Two high voltage inputs are available for contact monitoring or as external wake-up inputs. A current sense operational amplifier is EW SUFFIX (PB-FREE) available for load current monitoring. 98ARH99137A 32-PIN SOICW The 33689 has three operational modes: ? Normal (all functions available) ? Sleep (VDD OFF, wake-up via LIN bus or wake-up inputs) ? Stop (VDD ON, wake-up via MCU, LIN bus, or wake-up inputs) ORDERING INFORMATION Device Features Temperature (Add R2 Suffix for Tape Package Range (T ) ? Full-duplex SPI Interface at frequencies up to 4.0 MHz A and Reel) ? LIN transceiver capable to 100 kbps with waveshaping capability MC33689DPEW -40 ?C to 125 ?C 32 SOICW ?5.0 V low dropout regulator with full fault detection and protection ? One 50 mA and two 150 mA protected high side switches ? Current sense operational amplifier ? Compatible with LIN 2.0 specification package V V DD PWR 33689 VS1 HS3 VS2 L1 VCC 5.0 V L2 VDD WDC HS1 CS CS HS2 SCK SCLK MCU SPI MOSI MOSI MISO MISO E+ INT E- RST GND IN TGND OUT AGND TXD LIN BUS RXD Figure 1. 33689 Simplified Application Diagram Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as may be required, to permit improvements in the design of its products. ? Freescale Semiconductor, Inc., 2006-2012. All rights reserved.INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM 5.0 V/50 mA VS1 VDD Voltage Regulator Reset RST Control Window VS2 WDC Watchdog IN HS1 MOSI SPI HS2 MISO and SCLK Mode Pre-Driver CS Control HS3 INT VCC L1 Current E- Sense E+ L2 Op Amp OUT VS1 TXD LIN LIN Physical Interface RXD GND TGND AGND Figure 2. 33689 Simplified Internal Block Diagram 33689 Analog Integrated Circuit Device Data 2 Freescale SemiconductorDocument Number: MC33689 Freescale Semiconductor Rev. 8.0, 9/2012 Technical Data System Basis Chip with LIN 33689D Transceiver The 33689 is a serial peripheral interface (SPI) controlled system basis chip (SBC) that combines many frequently used functions in an MCU-based system plus a local interconnect network (LIN) SYSTEM BASIS CHIP WITH LIN transceiver. Applications include power window, mirror, and seat controls. The 33689 has a 5.0 V, 50 mA low dropout regulator with full protection and reporting features. The device provides full SPI- readable diagnostics and a selectable timing watchdog for detecting errant operation. The LIN transceiver waveshaping circuitry can be disabled for higher data rates. One 50 mA and two 150 mA high side switches with output protection are available to drive inductive or resistive loads. The 150 mA switches can be pulse-width modulated (PWM). Two high voltage inputs are available for contact monitoring or as external wake-up inputs. A current sense operational amplifier is EW SUFFIX (PB-FREE) available for load current monitoring. 98ARH99137A 32-PIN SOICW The 33689 has three operational modes: ? Normal (all functions available) ? Sleep (VDD OFF, wake-up via LIN bus or wake-up inputs) ? Stop (VDD ON, wake-up via MCU, LIN bus, or wake-up inputs) ORDERING INFORMATION Device Features Temperature (Add R2 Suffix for Tape Package Range (T ) ? Full-duplex SPI Interface at frequencies up to 4.0 MHz A and Reel) ? LIN transceiver capable to 100 kbps with waveshaping capability MC33689DPEW -40 ?C to 125 ?C 32 SOICW ?5.0 V low dropout regulator with full fault detection and protection ? One 50 mA and two 150 mA protected high side switches ? Current sense operational amplifier ? Compatible with LIN 2.0 specification package V V DD PWR 33689 VS1 HS3 VS2 L1 VCC 5.0 V L2 VDD WDC HS1 CS CS HS2 SCK SCLK MCU SPI MOSI MOSI MISO MISO E+ INT E- RST GND IN TGND OUT AGND TXD LIN BUS RXD Figure 1. 33689 Simplified Application Diagram Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as may be required, to permit improvements in the design of its products. ? Freescale Semiconductor, Inc., 2006-2012. All rights reserved.Document Number: MC33689 Freescale Semiconductor Rev. 8.0, 9/2012 Technical Data System Basis Chip with LIN 33689D Transceiver The 33689 is a serial peripheral interface (SPI) controlled system basis chip (SBC) that combines many frequently used functions in an MCU-based system plus a local interconnect network (LIN) SYSTEM BASIS CHIP WITH LIN transceiver. Applications include power window, mirror, and seat controls. The 33689 has a 5.0 V, 50 mA low dropout regulator with full protection and reporting features. The device provides full SPI- readable diagnostics and a selectable timing watchdog for detecting errant operation. The LIN transceiver waveshaping circuitry can be disabled for higher data rates. One 50 mA and two 150 mA high side switches with output protection are available to drive inductive or resistive loads. The 150 mA switches can be pulse-width modulated (PWM). Two high voltage inputs are available for contact monitoring or as external wake-up inputs. A current sense operational amplifier is EW SUFFIX (PB-FREE) available for load current monitoring. 98ARH99137A 32-PIN SOICW The 33689 has three operational modes: ? Normal (all functions available) ? Sleep (VDD OFF, wake-up via LIN bus or wake-up inputs) ? Stop (VDD ON, wake-up via MCU, LIN bus, or wake-up inputs) ORDERING INFORMATION Device Features Temperature (Add R2 Suffix for Tape Package Range (T ) ? Full-duplex SPI Interface at frequencies up to 4.0 MHz A and Reel) ? LIN transceiver capable to 100 kbps with waveshaping capability MC33689DPEW -40 ?C to 125 ?C 32 SOICW ?5.0 V low dropout regulator with full fault detection and protection ? One 50 mA and two 150 mA protected high side switches ? Current sense operational amplifier ? Compatible with LIN 2.0 specification package V V DD PWR 33689 VS1 HS3 VS2 L1 VCC 5.0 V L2 VDD WDC HS1 CS CS HS2 SCK SCLK MCU SPI MOSI MOSI MISO MISO E+ INT E- RST GND IN TGND OUT AGND TXD LIN BUS RXD Figure 1. 33689 Simplified Application Diagram Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as may be required, to permit improvements in the design of its products. ? Freescale Semiconductor, Inc., 2006-2012. All rights reserved.INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM 5.0 V/50 mA VS1 VDD Voltage Regulator Reset RST Control Window VS2 WDC Watchdog IN HS1 MOSI SPI HS2 MISO and SCLK Mode Pre-Driver CS Control HS3 INT VCC L1 Current E- Sense E+ L2 Op Amp OUT VS1 TXD LIN LIN Physical Interface RXD GND TGND AGND Figure 2. 33689 Simplified Internal Block Diagram 33689 Analog Integrated Circuit Device Data 2 Freescale SemiconductorPIN CONNECTIONS PIN CONNECTIONS NC 1 TXD 32 L1 2 RXD 31 NC 3 INT 30 L2 4 CS 29 HS3 5 MISO 28 HS2 6 MOSI 27 HS1 7 26 SCLK TGND 8 25 TGND TGND 9 24 TGND 10 VS2 23 IN 11 RST LIN 22 12 GND 21 WDC 13 VS1 20 E+ 14 NC 19 E- 15 VDD 18 OUT 16 AGND 17 VCC Figure 3. 33689 32-SOICW Pin Connections Table 1. 33689 32-SOICW Pin Definitions A functional description of each pin can be found in the Functional Pin Description section beginning on page 19. Pin Pin Name Formal Name Pin Function Definition No internal connection to these pins. 1, 3, 14 NC No Connect N/A Inputs from external switches or from logic circuitry. 2, 4 L1, L2 Level Inputs 1 and 2 Input High-side (HS) drive power outputs. SPI-controlled for driving system 5 ? 7 HS3 ? HS1 High-Side Driver Output loads. Outputs 3 through 1 Thermal ground pins for the device. 8, 9, 24, 25 TGND Thermal Ground N/A Supply pin for the high-side switches HS1, HS2, and HS3. 10 VS2 Voltage Supply 2 Input Bidirectional pin that represents the single-wire bus transmitter and 11 LIN LIN Bus Input / Output receiver. Electrical ground pin for the device. 12 GND Ground N/A Supply pin for the 5.0 V regulator, the LIN physical interface, and the 13 VS1 Voltage Supply 1 Input internal logic. Output of the 5.0 V regulator. 15 VDD 5.0 V Regulator Output Output Analog ground pin for voltage regulator and current sense operational 16 AGND Analog Ground N/A amplifier. 5.0 V supply for the internal current sense operational amplifier. 17 VCC Power Supply In Input Output of the internal current sense operational amplifier. 18 OUT Amplifier Output Output Inverted input of the internal current sense operational amplifier. 19 E- Amplifier Inverted Input Input Non-inverted input of the internal current sense operational amplifier. 20 E+ Amplifier Non-Inverted Input Input Configuration pin for the watchdog timer. 21 Watchdog Reference WDC Configuration (Active Low) 33689 Analog Integrated Circuit Device Data Freescale Semiconductor 3Document Number: MC33689 Freescale Semiconductor Rev. 8.0, 9/2012 Technical Data System Basis Chip with LIN 33689D Transceiver The 33689 is a serial peripheral interface (SPI) controlled system basis chip (SBC) that combines many frequently used functions in an MCU-based system plus a local interconnect network (LIN) SYSTEM BASIS CHIP WITH LIN transceiver. Applications include power window, mirror, and seat controls. The 33689 has a 5.0 V, 50 mA low dropout regulator with full protection and reporting features. The device provides full SPI- readable diagnostics and a selectable timing watchdog for detecting errant operation. The LIN transceiver waveshaping circuitry can be disabled for higher data rates. One 50 mA and two 150 mA high side switches with output protection are available to drive inductive or resistive loads. The 150 mA switches can be pulse-width modulated (PWM). Two high voltage inputs are available for contact monitoring or as external wake-up inputs. A current sense operational amplifier is EW SUFFIX (PB-FREE) available for load current monitoring. 98ARH99137A 32-PIN SOICW The 33689 has three operational modes: ? Normal (all functions available) ? Sleep (VDD OFF, wake-up via LIN bus or wake-up inputs) ? Stop (VDD ON, wake-up via MCU, LIN bus, or wake-up inputs) ORDERING INFORMATION Device Features Temperature (Add R2 Suffix for Tape Package Range (T ) ? Full-duplex SPI Interface at frequencies up to 4.0 MHz A and Reel) ? LIN transceiver capable to 100 kbps with waveshaping capability MC33689DPEW -40 ?C to 125 ?C 32 SOICW ?5.0 V low dropout regulator with full fault detection and protection ? One 50 mA and two 150 mA protected high side switches ? Current sense operational amplifier ? Compatible with LIN 2.0 specification package V V DD PWR 33689 VS1 HS3 VS2 L1 VCC 5.0 V L2 VDD WDC HS1 CS CS HS2 SCK SCLK MCU SPI MOSI MOSI MISO MISO E+ INT E- RST GND IN TGND OUT AGND TXD LIN BUS RXD Figure 1. 33689 Simplified Application Diagram Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as may be required, to permit improvements in the design of its products. ? Freescale Semiconductor, Inc., 2006-2012. All rights reserved.Document Number: MC33689 Freescale Semiconductor Rev. 8.0, 9/2012 Technical Data System Basis Chip with LIN 33689D Transceiver The 33689 is a serial peripheral interface (SPI) controlled system basis chip (SBC) that combines many frequently used functions in an MCU-based system plus a local interconnect network (LIN) SYSTEM BASIS CHIP WITH LIN transceiver. Applications include power window, mirror, and seat controls. The 33689 has a 5.0 V, 50 mA low dropout regulator with full protection and reporting features. The device provides full SPI- readable diagnostics and a selectable timing watchdog for detecting errant operation. The LIN transceiver waveshaping circuitry can be disabled for higher data rates. One 50 mA and two 150 mA high side switches with output protection are available to drive inductive or resistive loads. The 150 mA switches can be pulse-width modulated (PWM). Two high voltage inputs are available for contact monitoring or as external wake-up inputs. A current sense operational amplifier is EW SUFFIX (PB-FREE) available for load current monitoring. 98ARH99137A 32-PIN SOICW The 33689 has three operational modes: ? Normal (all functions available) ? Sleep (VDD OFF, wake-up via LIN bus or wake-up inputs) ? Stop (VDD ON, wake-up via MCU, LIN bus, or wake-up inputs) ORDERING INFORMATION Device Features Temperature (Add R2 Suffix for Tape Package Range (T ) ? Full-duplex SPI Interface at frequencies up to 4.0 MHz A and Reel) ? LIN transceiver capable to 100 kbps with waveshaping capability MC33689DPEW -40 ?C to 125 ?C 32 SOICW ?5.0 V low dropout regulator with full fault detection and protection ? One 50 mA and two 150 mA protected high side switches ? Current sense operational amplifier ? Compatible with LIN 2.0 specification package V V DD PWR 33689 VS1 HS3 VS2 L1 VCC 5.0 V L2 VDD WDC HS1 CS CS HS2 SCK SCLK MCU SPI MOSI MOSI MISO MISO E+ INT E- RST GND IN TGND OUT AGND TXD LIN BUS RXD Figure 1. 33689 Simplified Application Diagram Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as may be required, to permit improvements in the design of its products. ? Freescale Semiconductor, Inc., 2006-2012. All rights reserved.INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM 5.0 V/50 mA VS1 VDD Voltage Regulator Reset RST Control Window VS2 WDC Watchdog IN HS1 MOSI SPI HS2 MISO and SCLK Mode Pre-Driver CS Control HS3 INT VCC L1 Current E- Sense E+ L2 Op Amp OUT VS1 TXD LIN LIN Physical Interface RXD GND TGND AGND Figure 2. 33689 Simplified Internal Block Diagram 33689 Analog Integrated Circuit Device Data 2 Freescale SemiconductorDocument Number: MC33689 Freescale Semiconductor Rev. 8.0, 9/2012 Technical Data System Basis Chip with LIN 33689D Transceiver The 33689 is a serial peripheral interface (SPI) controlled system basis chip (SBC) that combines many frequently used functions in an MCU-based system plus a local interconnect network (LIN) SYSTEM BASIS CHIP WITH LIN transceiver. Applications include power window, mirror, and seat controls. The 33689 has a 5.0 V, 50 mA low dropout regulator with full protection and reporting features. The device provides full SPI- readable diagnostics and a selectable timing watchdog for detecting errant operation. The LIN transceiver waveshaping circuitry can be disabled for higher data rates. One 50 mA and two 150 mA high side switches with output protection are available to drive inductive or resistive loads. The 150 mA switches can be pulse-width modulated (PWM). Two high voltage inputs are available for contact monitoring or as external wake-up inputs. A current sense operational amplifier is EW SUFFIX (PB-FREE) available for load current monitoring. 98ARH99137A 32-PIN SOICW The 33689 has three operational modes: ? Normal (all functions available) ? Sleep (VDD OFF, wake-up via LIN bus or wake-up inputs) ? Stop (VDD ON, wake-up via MCU, LIN bus, or wake-up inputs) ORDERING INFORMATION Device Features Temperature (Add R2 Suffix for Tape Package Range (T ) ? Full-duplex SPI Interface at frequencies up to 4.0 MHz A and Reel) ? LIN transceiver capable to 100 kbps with waveshaping capability MC33689DPEW -40 ?C to 125 ?C 32 SOICW ?5.0 V low dropout regulator with full fault detection and protection ? One 50 mA and two 150 mA protected high side switches ? Current sense operational amplifier ? Compatible with LIN 2.0 specification package V V DD PWR 33689 VS1 HS3 VS2 L1 VCC 5.0 V L2 VDD WDC HS1 CS CS HS2 SCK SCLK MCU SPI MOSI MOSI MISO MISO E+ INT E- RST GND IN TGND OUT AGND TXD LIN BUS RXD Figure 1. 33689 Simplified Application Diagram Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as may be required, to permit improvements in the design of its products. ? Freescale Semiconductor, Inc., 2006-2012. All rights reserved.Document Number: MC33689 Freescale Semiconductor Rev. 8.0, 9/2012 Technical Data System Basis Chip with LIN 33689D Transceiver The 33689 is a serial peripheral interface (SPI) controlled system basis chip (SBC) that combines many frequently used functions in an MCU-based system plus a local interconnect network (LIN) SYSTEM BASIS CHIP WITH LIN transceiver. Applications include power window, mirror, and seat controls. The 33689 has a 5.0 V, 50 mA low dropout regulator with full protection and reporting features. The device provides full SPI- readable diagnostics and a selectable timing watchdog for detecting errant operation. The LIN transceiver waveshaping circuitry can be disabled for higher data rates. One 50 mA and two 150 mA high side switches with output protection are available to drive inductive or resistive loads. The 150 mA switches can be pulse-width modulated (PWM). Two high voltage inputs are available for contact monitoring or as external wake-up inputs. A current sense operational amplifier is EW SUFFIX (PB-FREE) available for load current monitoring. 98ARH99137A 32-PIN SOICW The 33689 has three operational modes: ? Normal (all functions available) ? Sleep (VDD OFF, wake-up via LIN bus or wake-up inputs) ? Stop (VDD ON, wake-up via MCU, LIN bus, or wake-up inputs) ORDERING INFORMATION Device Features Temperature (Add R2 Suffix for Tape Package Range (T ) ? Full-duplex SPI Interface at frequencies up to 4.0 MHz A and Reel) ? LIN transceiver capable to 100 kbps with waveshaping capability MC33689DPEW -40 ?C to 125 ?C 32 SOICW ?5.0 V low dropout regulator with full fault detection and protection ? One 50 mA and two 150 mA protected high side switches ? Current sense operational amplifier ? Compatible with LIN 2.0 specification package V V DD PWR 33689 VS1 HS3 VS2 L1 VCC 5.0 V L2 VDD WDC HS1 CS CS HS2 SCK SCLK MCU SPI MOSI MOSI MISO MISO E+ INT E- RST GND IN TGND OUT AGND TXD LIN BUS RXD Figure 1. 33689 Simplified Application Diagram Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as may be required, to permit improvements in the design of its products. ? Freescale Semiconductor, Inc., 2006-2012. All rights reserved.INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM 5.0 V/50 mA VS1 VDD Voltage Regulator Reset RST Control Window VS2 WDC Watchdog IN HS1 MOSI SPI HS2 MISO and SCLK Mode Pre-Driver CS Control HS3 INT VCC L1 Current E- Sense E+ L2 Op Amp OUT VS1 TXD LIN LIN Physical Interface RXD GND TGND AGND Figure 2. 33689 Simplified Internal Block Diagram 33689 Analog Integrated Circuit Device Data 2 Freescale SemiconductorPIN CONNECTIONS PIN CONNECTIONS NC 1 TXD 32 L1 2 RXD 31 NC 3 INT 30 L2 4 CS 29 HS3 5 MISO 28 HS2 6 MOSI 27 HS1 7 26 SCLK TGND 8 25 TGND TGND 9 24 TGND 10 VS2 23 IN 11 RST LIN 22 12 GND 21 WDC 13 VS1 20 E+ 14 NC 19 E- 15 VDD 18 OUT 16 AGND 17 VCC Figure 3. 33689 32-SOICW Pin Connections Table 1. 33689 32-SOICW Pin Definitions A functional description of each pin can be found in the Functional Pin Description section beginning on page 19. Pin Pin Name Formal Name Pin Function Definition No internal connection to these pins. 1, 3, 14 NC No Connect N/A Inputs from external switches or from logic circuitry. 2, 4 L1, L2 Level Inputs 1 and 2 Input High-side (HS) drive power outputs. SPI-controlled for driving system 5 ? 7 HS3 ? HS1 High-Side Driver Output loads. Outputs 3 through 1 Thermal ground pins for the device. 8, 9, 24, 25 TGND Thermal Ground N/A Supply pin for the high-side switches HS1, HS2, and HS3. 10 VS2 Voltage Supply 2 Input Bidirectional pin that represents the single-wire bus transmitter and 11 LIN LIN Bus Input / Output receiver. Electrical ground pin for the device. 12 GND Ground N/A Supply pin for the 5.0 V regulator, the LIN physical interface, and the 13 VS1 Voltage Supply 1 Input internal logic. Output of the 5.0 V regulator. 15 VDD 5.0 V Regulator Output Output Analog ground pin for voltage regulator and current sense operational 16 AGND Analog Ground N/A amplifier. 5.0 V supply for the internal current sense operational amplifier. 17 VCC Power Supply In Input Output of the internal current sense operational amplifier. 18 OUT Amplifier Output Output Inverted input of the internal current sense operational amplifier. 19 E- Amplifier Inverted Input Input Non-inverted input of the internal current sense operational amplifier. 20 E+ Amplifier Non-Inverted Input Input Configuration pin for the watchdog timer. 21 Watchdog Reference WDC Configuration (Active Low) 33689 Analog Integrated Circuit Device Data Freescale Semiconductor 3

Tariff Concession Code
Tariff Desc

Free
8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
FR9
Freescale
Freescale Semiconductor - NXP
Nexperia
NEXPERIA USA INC
Nexperia USA Inc.
NXP Freescale
NXP (FREESCALE)
NXP / Freescale
NXP SEMI
NXP Semicon
NXP SEMICONDUCTOR
NXP Semiconductors
NXP USA Inc.
PH3
PHI