LS1024ASE7MLA

Freescale Semiconductor Document Number: LS1024A Data Sheet: Advanced Information Rev. 0, 09/2014 QorIQ LS1024A Data Sheet LS1024A The LS1024A product family addresses a wide variety the powerful LRO/TSO and XOR Engine, provide an of applications ranging from high-end VoIP and Video ideal solution for Network Attached Storage enabled home gateways, Small-to-Midsized Business applications. (SMB) high performance security appliances to In order to provide performance scalability and Ethernet powered 802.11ac enterprise access points maximum flexibility the LS1024A family of processors and consumer networked storage products. includes single and dual ARM Cortex-A9 core Building upon the field-hardened LS102MA, the devices from 650 MHz to 1.2 GHz delivering up to 6000 LS1024A series of processors delivers vastly increased DMIPS. processing power and VoIP density, wire speed The LS1024A OpenWRT Linux-based SDK is handling of small packets, DRM compliant security and optimized for both single- and dual-core operation. The enterprise grade VPN and SSL throughput. The new software deliverable for the LS1024A dual core devices chip allows considerable system cost savings by are backward compatible with the LS102MA and 100 integrating the new features that are now emerging in line of products. the CPE market. Additionally, Freescale s rich ecosystem delivers LS1024A leverages the energy efficient core turnkey solutions that reduce time-to-market and lower technology of ARM and Freescale s low-power design development costs for VPN/SSL SMB routers, home process to achieve the lowest power consumption in its gateway, Consumer NAS, and Enterprise Access Point class. Additionally, the companion software manufacturers. development kit provides a rich set of power management features to address the energy saving Figure 1-1 shows the block diagram of LS1024A device. goals of service providers and product manufacturers worldwide. In addition to providing high throughput IPSec and SSL CPU offload, the LS1024A s onboard security engine includes a powerful Deep Packet Inspection Engine with GZIP decompression capability. The device s three Ethernet interfaces allow for DMZ configuration providing further security for SOHO/SMB routers and gateways. LS1024A I/O interfaces in conjunction with Freescale s innovative multi-layer bus architecture allows non-blocking concurrent transactions across all data interfaces, thus minimizing on-chip packet processing latency. The LS1024A s SATA-2 interfaces, along with 2014 Freescale Semiconductor, Inc.Table of Contents Product Applications . 1 Low Speed SPI . 85 Features by Device Summary . 1 Overview . 85 Features 85 Technical Overview . 3 Functional Description . 85 External Interfaces and Functional Blocks . 3 Timing Parameters 89 Pinout and Signal Summary . 7 Timer 91 Ball Map . 7 Introduction . 91 Signal Summary 27 Features 91 Unused Interfaces . 41 Functional Description . 91 Expansion Bus Interface . 45 One Time Programmable Memory . 95 Introduction . 45 Features 95 Features . 45 Functional Description . 95 Block Overview 46 PCI Express Interface . 99 Block Functional Description 47 Bootstrap Synchronization 59 Introduction . 99 Asynchronous Interface 60 Features 99 PCI Express Electrical Specifications 100 DDR3 Controller . 61 Dual Core SMP ARM Cortex-A9 105 Introduction . 61 DDR3 Controller Features 61 Overview 105 Supported Memory Configurations . 61 ARM Cortex-A9 Features . 105 Functional Description . 62 L2 Cache Features . 105 DDR3 SDRAM Interface Bus Timing . 64 A9 Interrupt Controller . 106 General Purpose Input Output 67 AXI / AHB Cross Connect Fabric . 109 Introduction . 67 Features . 109 Features and Functions . 67 Trust Zone . 109 Clock and Reset . 69 DUSI Subsystem 113 Clock Features . 69 Features . 113 Reset Features 70 DUSI Block Diagram . 114 Clock Functional Description 70 Functional Description 115 Reset Functional Description 76 Timing Parameters . 117 Timing Parameters 77 Deep Packet Inspection . 121 Real Time Clock . 81 Content Inspection Engine (CIE) 121 Features . 81 Decompression Engine (Decomp) . 121 Function Description 82 RTC Operation . 82 QorIQ LS1024A Data sheet, Rev 0 Freescale Semiconductor iii