HEF4541BT

HEF4541B Programmable timer Rev. 5 15 December 2015 Product data sheet 1. General description The HEF4541B is a programmable timer which consists of a 16-stage binary counter, an integrated oscillator to be used with external timing components, an automatic power-on reset and output control logic. The frequency of the oscillator is determined by the external components R and C within the frequency range 1 Hz to 100 kHz. This oscillator may TC TC be replaced by an external clock signal at input RS, the timer advances on the positive-going transition of RS. A LOW on the auto reset input (AR) and a LOW on the master reset input (MR) enables the internal power-on reset. A HIGH level at input MR resets the counter independent on all other inputs. Resetting disables the oscillator to provide no active power dissipation. A HIGH at input AR turns off the power-on reset to provide a low quiescent power 8 10 dissipation of the timer. The 16-stage counter divides the oscillator frequency by 2 , 2 , 13 16 2 or 2 depending on the state of the address inputs (A0, A1). The divided oscillator frequency is available at output O. The phase input (PH) features a complementary output signal. When the mode select input (MODE) is LOW the timer is a single transition timer n and when HIGH the timer is a 2 frequency divider. It operates over a recommended V power supply range of 3 V to 15 V referenced to V DD SS (usually ground). Unused inputs must be connected to V , V , or another input. DD SS 2. Features and benefits Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Operates across the automotive temperature range 40 C to +85 C Complies with JEDEC standard JESD 13-B 3. Ordering information Table 1. Ordering information All types operate from 40 C to +85 C. Type number Package Name Description Version HEF4541BT SO14 plastic small outline package 14 leads body width 3.9 mm SOT108-1HEF4541B NXP Semiconductors Programmable timer 4. Functional diagram &7& & 02 ( ,13876 &21752/ 287387 < %,1 5 2 5 * ( 67 &2817(5 32:(5 21 & 5(6(7 3+ DDL Fig 1. Functional diagram &7& & &2817(5 5(6(7 &2817(5 5(6(7 08 32:(5 21 5 & 7+ / 5(6(7 02 ( 3+ 2 DDL Fig 2. Logic diagram HEF4541B All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 5 15 December 2015 2 of 16 05 &3 &3 56 57 05 &3 57 56