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74LVC2G126DP,125 Nexperia
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Zener Diodes DIODE ZENER 5 PCT Stock : 5903
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Transistor: PNP; bipolar; BRT; 50V; 100mA; 250mW; SOT23; R1: 2.2kO Stock : 367000
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Diode: Zener; 0.4/0.5W; 75V; Package: Ammo Pack; DO35; 250mA Stock : 10000
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Diode: Zener; 0.4/0.5W; 43V; Package: Ammo Pack; DO35; 250mA Stock : 6930
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Buffers & Line Drivers 5V DUAL BUFFER GATE Stock : 75396
Buffers & Line Drivers NON-INVRT 3-STATE BUF Stock : 1
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Buffer/Line Driver 6-CH Non-Inverting 3-ST CMOS 16-Pin SOIC Rail Stock : 1
HEF4050BP LEAD FREE HEXNONINVERTB* DIP Stock : 0
Buffers & Line Drivers HEX BUFFER/DRIVER Stock : 1
IC: digital; buffer; Channels:4; Inputs:8; SMD; TSSOP14; Series: LCX Stock : 90
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74LVC2G126 Dual bus buffer/line driver 3-state Rev. 15 28 April 2020 Product data sheet 1. General description The 74LVC2G126 is a dual buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using I . The I circuitry OFF OFF disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8-B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V 24 mA output drive (V = 3.0 V) CC CMOS low power consumption I circuitry provides partial Power-down mode operation OFF Latch-up performance exceeds 250 mA Direct interface with TTL levels Multiple package options Specified from -40 C to +85 C and -40 C to +125 CNexperia 74LVC2G126 Dual bus buffer/line driver 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC2G126DP -40 C to +125 C TSSOP8 plastic thin shrink small outline package 8 leads SOT505-2 body width 3 mm lead length 0.5 mm 74LVC2G126DC -40 C to +125 C VSSOP8 plastic very thin shrink small outline package 8 leads SOT765-1 body width 2.3 mm 74LVC2G126GT -40 C to +125 C XSON8 plastic extremely thin small outline package no leads SOT833-1 8 terminals body 1 1.95 0.5 mm 74LVC2G126GF -40 C to +125 C XSON8 extremely thin small outline package no leads SOT1089 8 terminals body 1.35 1 0.5 mm 74LVC2G126GN -40 C to +125 C XSON8 extremely thin small outline package no leads SOT1116 8 terminals body 1.2 1.0 0.35 mm 74LVC2G126GS -40 C to +125 C XSON8 extremely thin small outline package no leads SOT1203 8 terminals body 1.35 1.0 0.35 mm 4. Marking Table 2. Marking codes Type number Marking code 1 74LVC2G126DP V26 74LVC2G126DC V26 74LVC2G126GT V26 74LVC2G126GF VN 74LVC2G126GN VN 74LVC2G126GS VN 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1Y 1A 1OE 2Y nA nY 2A 2OE nOE 001aah787 mna234 Fig. 1. Logic symbol Fig. 2. Logic diagram (one gate) 74LVC2G126 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 15 28 April 2020 2 / 17