74LVC1G97GW

74LVC1G97 Low-power configurable multiple function gate Rev. 4 10 September 2014 Product data sheet 1. General description The 74LVC1G97 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and buffer using the 3-bit input. All inputs can be connected to V or CC GND. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power-down applications using I . OFF The I circuitry disables the output, preventing the damaging backflow current through OFF the device when it is powered down. 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V). 24 mA output drive (V =3.0 V) CC ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V Multiple package options Specified from 40 Cto+85 C and 40 Cto+125 C.74LVC1G97 NXP Semiconductors Low-power configurable multiple function gate 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G97GW 40 Cto+125 C SC-88 plastic surface-mounted package 6 leads SOT363 74LVC1G97GV 40 Cto+125 C SC-74 plastic surface mounted package 6 leads SOT457 74LVC1G97GM 40 Cto+125 C XSON6 plastic extremely thin small outline package SOT886 no leads 6 terminals body 1 1.45 0.5 mm 74LVC1G97GF 40 Cto+125 C XSON6 plastic extremely thin small outline package SOT891 no leads 6 terminals body 1 1 0.5 mm 74LVC1G97GN 40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74LVC1G97GS 40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mm 4. Marking Table 2. Marking 1 Type number Marking code 74LVC1G97GW YV 74LVC1G97GV Y97 74LVC1G97GM YV 74LVC1G97GF YV 74LVC1G97GN YV 74LVC1G97GS YV 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram < % & DG D Fig 1. Logic symbol 74LVC1G97 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 4 10 September 2014 2 of 20