Product Information

74LVC1G57GV-Q100H

74LVC1G57GV-Q100H electronic component of Nexperia

Datasheet
Logic Gates Low pwr configurable multipfunction gate

Manufacturer: Nexperia
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Price (USD)

1: USD 0.4972 ea
Line Total: USD 0.4972

2677 - Global Stock
Ships to you between
Wed. 10 Apr to Fri. 12 Apr
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
2677 - Global Stock


Ships to you between Wed. 10 Apr to Fri. 12 Apr

MOQ : 1
Multiples : 1
1 : USD 0.3979
10 : USD 0.2829
100 : USD 0.1357
1000 : USD 0.0966
3000 : USD 0.0782
9000 : USD 0.077
24000 : USD 0.0725
45000 : USD 0.0701
99000 : USD 0.0667

     
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RoHS - XON
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74LVC1G57-Q100 Low-power configurable multiple function gate Rev. 3 4 June 2021 Product data sheet 1. General description The 74LVC1G57-Q100 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer using the 3-bit input. All inputs can be connected directly to V or GND. Inputs CC can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down applications using I . The I circuitry OFF OFF disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range from 1.65 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity 24 mA output drive (V = 3.0 V) CC CMOS low power dissipation Latch-up performance exceeds 250 mA Direct interface with TTL levels I circuitry provides partial Power-down mode operation OFF Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V). ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G57GW-Q100 -40 C to +125 C SC-88 plastic surface-mounted package 6 leads SOT363 74LVC1G57GV-Q100 -40 C to +125 C SC-74 plastic surface-mounted package 6 leads SOT457 TSOP6Nexperia 74LVC1G57-Q100 Low-power configurable multiple function gate 4. Marking Table 2. Marking Type number Marking code 1 74LVC1G57GW-Q100 YC 74LVC1G57GV-Q100 V57 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 3 A 4 Y 1 B 6 C 001aab583 Fig. 1. Logic symbol 6. Pinning information 6.1. Pinning 74LVC1G57 B 1 6 C GND 2 5 V CC A 3 4 Y 001aaf138 Fig. 2. Pin configuration SOT363 (SC-88) and SOT457 (SC-74 TSOP6) 6.2. Pin description Table 3. Pin description Symbol Pin Description B 1 data input GND 2 ground (0 V) A 3 data input Y 4 data output V 5 supply voltage CC C 6 data input 74LVC1G57 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 3 4 June 2021 2 / 14

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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