74HC2GU04GW,125

74HC2GU04 Dual unbuffered inverter Rev. 2 20 August 2014 Product data sheet 1. General description The 74HC2GU04 is a high-speed Si-gate CMOS device. The 74HC2GU04 provides two unbuffered inverters. 2. Features and benefits Wide supply voltage range from 2.0 V to 6.0 V Complies with JEDEC standard no. 7A High noise immunity ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Low power dissipation Balanced propagation delays Multiple package options Specified from 40 Cto+85 C and 40 Cto+125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC2GU04GW 40 C to +125 C SC-88 plastic surface-mounted package 6 leads SOT363 74HC2GU04GV 40 C to +125 C SC-74 plastic surface-mounted package (TSOP6) 6 leads SOT457 4. Marking Table 2. Marking Type number Marking code 74HC2GU04GW PD 74HC2GU04GV HU474HC2GU04 Nexperia Dual unbuffered inverter 5. Functional diagram 1 1 6 1 1A 1Y 6 3 2A 2Y 4 1 3 4 < mnb079 mnb080 D P Q Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one gate) 6. Pinning information 6.1 Pinning 74HC2GU04 1A 1 6 1Y GND 2 5 V CC 2A 3 4 2Y 001aaf305 Fig 4. Pin configuration 6.2 Pin description Table 3. Pin description Symbol Pin Description 1A 1 data input GND 2 ground (0 V) 2A 3 data input 2Y 4 data output V 5 supply voltage CC 1Y 6 data output 7. Functional description 1 Table 4. Function table Input Output nA nY LH HL 1 H = HIGH voltage level L = LOW voltage level. 74HC2GU04 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 2 20 August 2014 2 of 16