74AUP2G14GW

74AUP2G14 Low-power dual Schmitt trigger inverter Rev. 6 17 September 2015 Product data sheet 1. General description The 74AUP2G14 provides two inverting buffers with Schmitt trigger action which accept standard input signals. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. This device ensures a very low static and dynamic power consumption across the entire V range from 0.8 V to 3.6 V. CC This device is fully specified for partial power-down applications using I . The I OFF OFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage V and the negative voltage V is defined as the input T+ T hysteresis voltage V . H 2. Features and benefits Wide supply voltage range from 0.8 V to 3.6 V High noise immunity ESD protection: HBM JESD22-A114F Class 3A exceeds 5000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Low static power consumption I = 0.9 A (maximum) CC Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10 % of V CC I circuitry provides partial Power-down mode operation OFF Multiple package options Specified from 40 Cto+85 C and 40 Cto+125 C 3. Applications Wave and pulse shaper Astable multivibrator Monostable multivibrator74AUP2G14 NXP Semiconductors Low-power dual Schmitt trigger inverter 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP2G14GW 40 C to +125 C SC-88 plastic surface-mounted package 6 leads SOT363 74AUP2G14GM 40 C to +125 C XSON6 plastic extremely thin small outline package no leads SOT886 6 terminals body 1 1.45 0.5 mm 74AUP2G14GF 40 C to +125 C XSON6 plastic extremely thin small outline package no leads SOT891 6 terminals body 1 1 0.5 mm 74AUP2G14GN 40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74AUP2G14GS 40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mm 74AUP2G14GX 40 C to +125 C X2SON6 plastic thermal extremely thin small outline package SOT1255 no leads 6 terminals body 1 0.8 0.35 mm 5. Marking Table 2. Marking 1 Type number Marking code 74AUP2G14GW pK 74AUP2G14GM pK 74AUP2G14GF pK 74AUP2G14GN pK 74AUP2G14GS pK 74AUP2G14GX pK 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 6. Functional diagram < < < < E P Q E PQ E P Q Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram 74AUP2G14 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 6 17 September 2015 2 of 23