74AUP1T34GW-Q100H

74AUP1T34-Q100 Low-power dual supply translating buffer Rev. 3 18 May 2021 Product data sheet 1. General description The 74AUP1T34-Q100 is a single dual supply translating buffer. Input A is referenced to V CC(A) and output Y is referenced to V . Schmitt-trigger action at all inputs makes the circuit tolerant CC(Y) of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire V range from 1.1 V to 3.6 V. This device is fully specified for CC partial power down applications using I . The I circuitry disables the output, preventing the OFF OFF potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and -40 C to +125 C Wide supply voltage range from 1.1 V to 3.6 V High noise immunity Complies with JEDEC standards: JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: MIL-STD-883, method 3015 Class 3A. Exceeds 5000 V HBM JESD22-A114F Class 3A. Exceeds 5000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) Wide supply voltage range: V : 1.1 V to 3.6 V CC(A) V : 1.1 V to 3.6 V CC(Y) Low static power consumption I = 0.9 A (maximum) CC Each port operates over the full 1.1 V to 3.6 V power supply range Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10 % of V CC I circuitry provides partial Power-down mode operation OFF 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1T34GW-Q100 -40 C to +125 C TSSOP5 plastic thin shrink small outline package 5 leads SOT353-1 body width 1.25 mm 74AUP1T34GM-Q100 -40 C to +125 C XSON6 plastic extremely thin small outline package SOT886 no leads 6 terminals body 1 1.45 0.5 mmNexperia 74AUP1T34-Q100 Low-power dual supply translating buffer 4. Marking Table 2. Marking Type number Marking code 1 74AUP1T34GW-Q100 pQ 74AUP1T34GM-Q100 pQ 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram A Y A Y 001aac538 001aac537 001aac536 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram 6. Pinning information 6.1. Pinning 74AUP1T34 74AUP1T34 V 1 6 V CC(A) CC(Y) 1 5 V V CC(A) CC(Y) A 2 5 n.c. A 2 GND 3 4 Y GND 3 4 Y 001aad740 Transparent top view 001aad741 Fig. 4. Pin configuration SOT353-1 (TSSOP5) Fig. 5. Pin configuration SOT886 (XSON6) 6.2. Pin description Table 3. Pin description Symbol Pin Description TSSOP5 XSON6 V 1 1 supply voltage port A CC(A) A 2 2 data input A GND 3 3 ground (0 V) Y 4 4 data output Y n.c. - 5 not connected V 5 6 supply voltage port Y CC(Y) 74AUP1T34 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 3 18 May 2021 2 / 18