74AUP1G58GM,115

74AUP1G58 Low-power configurable multiple function gate Rev. 8 13 July 2021 Product data sheet 1. General description The 74AUP1G58 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XOR, inverter and buffer using the 3-bit input. All inputs can be connected directly to V or GND. This device CC ensures very low static and dynamic power consumption across the entire V range from 0.8 V to CC 3.6 V. This device is fully specified for partial power down applications using I . The I circuitry OFF OFF disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 0.8 V to 3.6 V CMOS low power dissipation High noise immunity Low static power consumption I = 0.9 A (maximum) CC Latch-up performance exceeds 100 mA per JESD 78 Class II Overvoltage tolerant inputs to 3.6 V Low noise overshoot and undershoot < 10 % of V CC I circuitry provides partial power-down mode operation OFF Latch-up performance exceeds 100 mA per JESD 78 Class II Level B ESD protection: HBM JESD22-A114F exceeds 5000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Multiple package options Specified from -40 C to +85 C and -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1G58GW -40 C to +125 C SC-88 plastic surface-mounted package 6 leads SOT363 74AUP1G58GM -40 C to +125 C XSON6 plastic extremely thin small outline package SOT886 no leads 6 terminals body 1 1.45 0.5 mm 74AUP1G58GN -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74AUP1G58GS -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mm 74AUP1G58GX -40 C to +125 C X2SON6 plastic thermal enhanced extremely SOT1255-2 thin small outline package no leads 6 terminals body 1.0 0.8 0.32 mmNexperia 74AUP1G58 Low-power configurable multiple function gate 4. Marking Table 2. Marking Type number Marking code 1 74AUP1G58GW aK 74AUP1G58GM aK 74AUP1G58GN aK 74AUP1G58GS aK 74AUP1G58GX aK 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 3 A 4 Y 1 B 6 C 001aab687 Fig. 1. Logic symbol 6. Pinning information 6.1. Pinning 74AUP1G58 74AUP1G58 B 1 6 C B 1 6 C GND 2 5 V CC GND 2 5 V CC A 3 4 Y A 3 4 Y 001aad698 001aad697 Transparent top view Fig. 2. Pin configuration SOT363 (SC-88) Fig. 3. Pin configuration SOT886 (XSON6) 74AUP1G58 74AUP1G58 B 1 6 C B 1 6 C GND 2 5 V CC GND 2 5 V CC A 3 4 Y 001aad690 A 3 4 Y aaa-019828 Transparent top view Transparent top view Fig. 4. Pin configuration SOT1115 and SOT1202 (XSON6) Fig. 5. Pin configuration SOT1255-2 (X2SON6) 74AUP1G58 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 8 13 July 2021 2 / 20