Product Information

74AUP1G57GS,132

74AUP1G57GS,132 electronic component of Nexperia

Datasheet
Logic Gates CONFIG 4.6 V 20 mA

Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 0.5771 ea
Line Total: USD 0.58

0 - Global Stock
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
0 - Global Stock


Ships to you between Fri. 26 Apr to Thu. 02 May

MOQ : 5000
Multiples : 5000
5000 : USD 0.2276

0 - Global Stock


Ships to you between Thu. 02 May to Mon. 06 May

MOQ : 1
Multiples : 1
1 : USD 0.4082
10 : USD 0.3323
100 : USD 0.2265
1000 : USD 0.1368
5000 : USD 0.1173
10000 : USD 0.1092
25000 : USD 0.1081
50000 : USD 0.1081

     
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RoHS - XON
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Logic Function
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74AUP1G57 Low-power configurable multiple function gate Rev. 9 4 November 2021 Product data sheet 1. General description The 74AUP1G57 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer using the 3-bit input. All inputs can be connected directly to V or GND. This device CC ensures very low static and dynamic power consumption across the entire V range from 0.8 V to CC 3.6 V. This device is fully specified for partial power down applications using I . The I circuitry OFF OFF disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 0.8 V to 3.6 V CMOS low power dissipation High noise immunity Overvoltage tolerant inputs to 3.6 V Low noise overshoot and undershoot < 10 % of V CC I circuitry provides partial power-down mode operation OFF Latch-up performance exceeds 100 mA per JESD 78 Class II Low static power consumption I = 0.9 A (maximum) CC Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 5000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Multiple package options Specified from -40 C to +85 C and -40 C to +125 CNexperia 74AUP1G57 Low-power configurable multiple function gate 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1G57GW -40 C to +125 C SC-88 plastic surface-mounted package 6 leads SOT363 74AUP1G57GM -40 C to +125 C XSON6 plastic extremely thin small outline package SOT886 no leads 6 terminals body 1 1.45 0.5 mm 74AUP1G57GN -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74AUP1G57GS -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mm 74AUP1G57GX -40 C to +125 C X2SON6 plastic thermal enhanced extremely SOT1255-2 thin small outline package no leads 6 terminals body 1.0 0.8 0.32 mm 4. Marking Table 2. Marking Type number Marking code 1 74AUP1G57GW aC 74AUP1G57GM aC 74AUP1G57GN aC 74AUP1G57GS aC 74AUP1G57GX aC 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 3 A 4 Y 1 B 6 C 001aab583 Fig. 1. Logic symbol 74AUP1G57 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 9 4 November 2021 2 / 20

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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