Product Information

74AUP1G38GM,132

74AUP1G38GM,132 electronic component of Nexperia

Datasheet
NXP Semiconductors Logic Gates 1.8V 1G LP 2-INPT

Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 0.5678 ea
Line Total: USD 0.5678

4340 - Global Stock
Ships to you between
Thu. 11 Apr to Mon. 15 Apr
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
3807 - Global Stock


Ships to you between Thu. 11 Apr to Mon. 15 Apr

MOQ : 1
Multiples : 1
1 : USD 0.437
10 : USD 0.3243
100 : USD 0.2024
1000 : USD 0.1127
5000 : USD 0.1024
10000 : USD 0.0886
25000 : USD 0.084
50000 : USD 0.0816
100000 : USD 0.0782

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Logic Family
Number of Gates
Number of Input Lines
Number of Output Lines
Low Level Output Current
Propagation Delay Time
Supply Voltage - Max
Supply Voltage - Min
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
Package / Case
Packaging
Brand
Logic Type
Factory Pack Quantity :
Function
Height
Length
Output Type
Width
Cnhts
Hts Code
Mxhts
Operating Supply Voltage
Product Type
Subcategory
Taric
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74AUP1G38 Low-power 2-input NAND gate (open drain) Rev. 7 4 April 2016 Product data sheet 1. General description The 74AUP1G38 provides the single 2-input NAND gate with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire V range from 0.8 V to 3.6 V. CC This device ensures a very low static and dynamic power consumption across the entire V range from 0.8 V to 3.6 V. CC This device is fully specified for partial power-down applications using I . OFF The I circuitry disables the output, preventing the damaging backflow current through OFF the device when it is powered down. 2. Features and benefits Wide supply voltage range from 0.8 V to 3.6 V High noise immunity Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F Class 3A exceeds 5000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Low static power consumption I = 0.9 A (maximum) CC Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10 % of V CC I circuitry provides partial power-down mode operation OFF Multiple package options Specified from 40 Cto+85 C and 40 Cto+125 C74AUP1G38 Nexperia Low-power 2-input NAND gate (open drain) 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1G38GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package 5 leads SOT353-1 body width 1.25 mm 74AUP1G38GM 40 C to +125 C XSON6 plastic extremely thin small outline package no leads SOT886 6 terminals body 1 1.45 0.5 mm 74AUP1G38GF 40 C to +125 C XSON6 plastic extremely thin small outline package no leads SOT891 6 terminals body 1 1 0.5 mm 74AUP1G38GN 40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74AUP1G38GS 40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mm 74AUP1G38GX 40 C to +125 C X2SON5 X2SON5: plastic thermal enhanced extremely thin SOT1226 small outline package no leads 5 terminals body 0.8 0.8 0.35 mm 4. Marking Table 2. Marking 1 Type number Marking code 74AUP1G38GW aB 74AUP1G38GM aB 74AUP1G38GF aB 74AUP1G38GN aB 74AUP1G38GS aB 74AUP1G38GX aB 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram < < % % DE D Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram 74AUP1G38 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 7 4 April 2016 2 of 19 DDE DDE *1

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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