Product Information

74AUP1G125GW-Q100H

74AUP1G125GW-Q100H electronic component of Nexperia

Datasheet
Buffers & Line Drivers Low-power buffer/ line driver

Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 0.3496 ea
Line Total: USD 0.3496

52162 - Global Stock
Ships to you between
Wed. 10 Apr to Fri. 12 Apr
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
5267 - Global Stock


Ships to you between Thu. 04 Apr to Wed. 10 Apr

MOQ : 1
Multiples : 1
1 : USD 0.1297
10 : USD 0.1105
100 : USD 0.1011
1000 : USD 0.0931
3000 : USD 0.0886
9000 : USD 0.085
24000 : USD 0.0832
45000 : USD 0.0832
99000 : USD 0.0832

3846 - Global Stock


Ships to you between
Thu. 11 Apr to Tue. 16 Apr

MOQ : 5
Multiples : 5
5 : USD 0.2352
50 : USD 0.1899
150 : USD 0.1705
500 : USD 0.1463
3000 : USD 0.114
6000 : USD 0.1075

52162 - Global Stock


Ships to you between Wed. 10 Apr to Fri. 12 Apr

MOQ : 1
Multiples : 1
1 : USD 0.3496
10 : USD 0.2541
100 : USD 0.1426
1000 : USD 0.1092
3000 : USD 0.0989
9000 : USD 0.092
24000 : USD 0.0862
45000 : USD 0.084
99000 : USD 0.0794

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Number of Input Lines
Number of Output Lines
Supply Voltage - Max
Supply Voltage - Min
Operating Supply Current
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
Package / Case
Packaging
Output Type
Brand
Logic Family
Logic Type
Number Of Channels
Pd - Power Dissipation
Product Type
Propagation Delay Time
Factory Pack Quantity :
Subcategory
Cnhts
Hts Code
Mxhts
Taric
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74AUP1G125-Q100 Low-power buffer/line driver 3-state Rev. 3 21 April 2021 Product data sheet 1. General description The 74AUP1G125-Q100 is a single buffer/line driver with 3-state output. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire V range from 0.8 V to 3.6 V. CC This device is fully specified for partial power down applications using I . The I circuitry OFF OFF disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range from 0.8 V to 3.6 V High noise immunity Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: MIL-STD-883, method 3015 Class 3A. Exceeds 5000 V HBM JESD22-A114F Class 3A. Exceeds 5000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) Low static power consumption I = 0.9 A (maximum) CC Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10 % of V CC Input-disable feature allows floating input conditions I circuitry provides partial Power-down mode operation OFFNexperia 74AUP1G125-Q100 Low-power buffer/line driver 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1G125GW-Q100 -40 C to +125 C TSSOP5 plastic thin shrink small outline package 5 leads SOT353-1 body width 1.25 mm 74AUP1G125GM-Q100 -40 C to +125 C XSON6 plastic extremely thin small outline package SOT886 no leads 6 terminals body 1 1.45 0.5 mm 74AUP1G125GS-Q100 -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mm 4. Marking Table 2. Marking Type number Marking code 1 74AUP1G125GW-Q100 pM 74AUP1G125GM-Q100 pM 74AUP1G125GS-Q100 pM 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 2 A Y 4 A Y 2 4 1 OE 1 EN OE mna118 mna119 001aad068 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram 6. Pinning information 6.1. Pinning 74AUP1G125 74AUP1G125 OE 1 6 V CC 74AUP1G125 OE 1 5 V OE 1 6 V CC CC A 2 5 n.c. A 2 5 n.c. A 2 GND 3 4 Y GND 3 4 Y GND 3 4 Y 001aab652 001aaf014 Transparent top view Transparent top view 001aab651 Fig. 4. Pin configuration SOT353-1 Fig. 5. Pin configuration SOT886 Fig. 6. Pin configuration SOT1202 (TSSOP5) (XSON6) (XSON6) 74AUP1G125 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 3 21 April 2021 2 / 17

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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