Product Information

74AUP1G00GW,125

74AUP1G00GW,125 electronic component of Nexperia

Datasheet
Logic Gates 1.8V SINGLE 2-INPUT

Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 0.3979 ea
Line Total: USD 0.4

4567 - Global Stock
Ships to you between
Wed. 08 May to Fri. 10 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
2589 - Global Stock


Ships to you between
Thu. 09 May to Tue. 14 May

MOQ : 5
Multiples : 5
5 : USD 0.2496
50 : USD 0.2191
150 : USD 0.2061
500 : USD 0.1898
3000 : USD 0.1826
6000 : USD 0.1784

4567 - Global Stock


Ships to you between Wed. 08 May to Fri. 10 May

MOQ : 1
Multiples : 1
1 : USD 0.3979
10 : USD 0.2679
100 : USD 0.1276
1000 : USD 0.0989
3000 : USD 0.0862
9000 : USD 0.0713
24000 : USD 0.069
99000 : USD 0.0644

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Product
Logic Function
Logic Family
Number of Gates
Number of Input Lines
Number of Output Lines
High Level Output Current
Low Level Output Current
Propagation Delay Time
Supply Voltage - Max
Supply Voltage - Min
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
Package / Case
Packaging
Operating Temperature Range
Output Current
Output Voltage
Brand
Number Of Lines In/Out
Power Dissipation
Factory Pack Quantity :
Function
Height
Length
Width
Logic Type
Cnhts
Hts Code
Mxhts
Operating Supply Voltage
Pd - Power Dissipation
Product Type
Subcategory
Taric
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74AUP1G00 Low-power 2-input NAND gate Rev. 7 23 April 2019 Product data sheet 1. General description The 74AUP1G00 provides the single 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire V range from 0.8 V to 3.6 V. CC This device ensures a very low static and dynamic power consumption across the entire V range CC from 0.8 V to 3.6 V. This device is fully specified for partial Power-down applications using I . The I circuitry OFF OFF disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 0.8 V to 3.6 V High noise immunity Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F Class 3A exceeds 5000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Low static power consumption I = 0.9 A (maximum) CC Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10 % of V CC I circuitry provides partial Power-down mode operation OFF Multiple package options Specified from -40 C to +85 C and -40 C to +125 CNexperia 74AUP1G00 Low-power 2-input NAND gate 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1G00GW -40 C to +125 C TSSOP5 plastic thin shrink small outline package 5 leads SOT353-1 body width 1.25 mm 74AUP1G00GM -40 C to +125 C XSON6 plastic extremely thin small outline package SOT886 no leads 6 terminals body 1 1.45 0.5 mm 74AUP1G00GF -40 C to +125 C XSON6 plastic extremely thin small outline package SOT891 no leads 6 terminals body 1 1 0.5 mm 74AUP1G00GN -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74AUP1G00GS -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mm 74AUP1G00GX -40 C to +125 C X2SON5 X2SON5: plastic thermal enhanced extremely SOT1226 thin small outline package no leads 5 terminals body 0.8 0.8 0.35 mm 4. Marking Table 2. Marking Type number Marking code 1 74AUP1G00GW pA 74AUP1G00GM pA 74AUP1G00GF pA 74AUP1G00GN pA 74AUP1G00GS pA 74AUP1G00GX pA 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram B 1 1 B & 4 Y 4 Y 2 A 2 A mna097 mna098 mna099 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram 74AUP1G00 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 7 23 April 2019 2 / 19

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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