Product Information

SY89854UMG-TR

SY89854UMG-TR electronic component of Microchip

Datasheet
Buffers & Line Drivers Low Power, Precision 1:4 LVPECL Fanout Buffer (I Temp, Green)

Manufacturer: Microchip
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 3.887 ea
Line Total: USD 3.887

1400 - Global Stock
Ships to you between
Wed. 10 Apr to Fri. 12 Apr
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
966 - Global Stock


Ships to you between Thu. 04 Apr to Wed. 10 Apr

MOQ : 1
Multiples : 1

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SY89854UMG-TR
Microchip

1 : USD 4.1688
10 : USD 4.0563
25 : USD 3.9437
100 : USD 3.8649
250 : USD 3.8649
500 : USD 3.8649

1400 - Global Stock


Ships to you between Wed. 10 Apr to Fri. 12 Apr

MOQ : 1
Multiples : 1

Stock Image

SY89854UMG-TR
Microchip

1 : USD 3.887
10 : USD 3.8755
25 : USD 3.404
100 : USD 3.1165
500 : USD 3.1165
1000 : USD 3.1165

     
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SY89854U Precision Low Power 1:4 LVPECL Fanout Buffer/Translator with Internal Termination General Description The SY89854U is a 2.5V/3.3V precision, high- speed, fully differential 1:4 LVPECL fanout buffer. Optimized to provide four identical output copies Precision Edge with less than 20ps of skew and less than 10ps (pp) Features total jitter, the SY89854U can process clock signals as fast as 2GHz. Precision 1:4, LVPECL fanout buffer The differential input includes Micrels unique, patent Low power: 137mW (2.5V typ) pending 3-pin input termination architecture that Guaranteed AC performance over temperature interfaces to any differential signal (AC or DC- and supply voltage: coupled) as small as 100mV (200mVpp) without any DC- to > 2GHz Clock f level shifting or termination resistor networks in the MAX signal path. For AC-coupled input interface <340ps t pd applications, an on-board output reference voltage <180ps t /t time r f (VREF-AC) is provided to bias the center-tap (VT) <20ps max. skew pin. The outputs are 800mV LVPECL, with fast Ultra-low jitter design: rise/fall times guaranteed to be less than 180ps. <1ps random jitter (rms) The SY89854U operates from a 2.5V 5% supply or <10ps deterministic jitter (pp) a 3.3V 10% supply and is guaranteed over the full <10ps total jitter (clock) industrial temperature range of 40C to +85C. (pp) The SY89854U is part of Micrels high-speed, Unique patent pending input termination and VT pin accepts DC-coupled and AC-coupled inputs Precision Edge product line. (CML, PECL, LVDS) All support documentation can be found on Micrels Typical 800mV (100k) LVPECL output swing web site at: www.micrel.com. Power supply 2.5V 5% or 3.3V 10% Industrial temperature range 40C to +85C Typical Applications Available in ultra-small (3mm x 3mm) 16-pin QFN package 200MHz (Q - /Q) Applications SONET and All GigE clock distribution Fibre Channel clock and data distribution Backplane distribution TIME (600ps/div.) United States Patent No. RE44,134 Precision Edge is a registered trademark of Micrel, Inc. August 2007 M9999-082907-C hbwhelp micrel.com or (408) 955-1690 Output Swing (200mV/div.)Micrel, Inc. SY89854U (1) Ordering Information Part Number Package Type Operating Package Marking Lead Range Finish SY89854UMG QFN-16 Industrial 854U with Pb-free bar-line indicator Pb-Free NiPdAu (2) SY89854UMGTR QFN-16 Industrial 854U with Pb-free bar-line indicator Pb-Free NiPdAu Notes: 1. Contact factory for die availability. Dice are guaranteed at T = 25C, DC Electricals Only. A 2. Tape and Reel. Pin Configuration 16-Pin QFN Pin Description Pin Number Pin Name Pin Function Differential Input: This input pair is the signal to be buffered. These inputs accept AC- or DC-coupled differential signals as small as 100mV (200mV ). Each pin PP 1, 4 IN, /IN of this pair internally terminates to a VT pin through 50. Note that this input will default to an indeterminate state if left open. Please refer to the Input Interface Applications section for more details. Input Termination Center-Tap: Each side of the differential input pair terminates to this pin. The VT pin provides a center-tap to a termination network for 2 VT maximum interface flexibility. See Input Interface Applications section for more details. Positive Power Supply. Bypass with 0.1F 0.01F low ESR capacitors as close 8,13 VCC to the VCC pin as possible. 15, 14 Q0, /Q0 Differential 100K LVPECL Output: These LVPECL outputs are the precision, low 12, 11 Q1, /Q1 skew copies of the input signal. Terminate with 50 to V 2V. Unused output CC 10, 9 Q2, /Q2 pairs may be left floating with no impact on jitter. See Output Interface 7, 6 Q3, /Q3 Applications section. GND, Ground. Ground pin and exposed pad must be connected to the same ground 5, 16 Exposed Pad plane. Reference Voltage: This output biases to V 1.2V. It is used when AC coupling CC the inputs (IN, /IN). Connect V to the VT pin. Bypass VREF-AF pin with a REF-AC 3 VREF-AC 0.01F low ESR capacitor to V . Maximum sink/source capability is 1.5mA. See CC Input Interface Applications section for more details. August 2007 2 M9999-082907-C hbwhelp micrel.com or (408) 955-1690

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8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

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