SY89850UMG-TR

SY89850U Precision Low-Power LVPECL Line Driver/Receiver with Internal Termination General Description The SY89850U is a 2.5V/3.3V precision, high-speed, Precision Edge differential receiver capable of handling clocks up to Features 4GHz and data streams up to 3.2Gbps. Guaranteed AC performance over temperature The differential input includes Micrel s unique, 3-pin and supply voltage: input termination architecture that allows users to interface to any differential signal (AC or DC-coupled) DC- to > 3.2Gbps data rate throughput as small as 100mV (200mV ) without any level PP 4GHz clock f (typ.) MAX shifting or termination resistor networks in the signal <280ps In-to-Out t pd path. The outputs are 800mV LVPECL, with extremely <160ps t /t r f fast rise/fall times guaranteed to be less than 160ps. Low power: 50mW (2.5V typ.) The SY89850U operates from a 2.5V 5% supply or a Ultra-low jitter design: 3.3V 10% supply and is guaranteed over the full <1ps random jitter industrial temperature range of 40C to +85C. The RMS SY89850U is part of Micrel s high-speed, Precision <10ps deterministic jitter PP Edge product line. <10ps total jitter (clock) PP All support documentation can be found on Micrel s Unique input termination and VT pin accepts DC- web site at www.micrel.com. and AC-coupled inputs (CML, PECL, LVDS) Typical 800mV (100k) LVPECL Output Swing Power supply 2.5V 5% or 3.3V 10% Typical Application Industrial temperature range 40C to +85C Available in ultra-small (2mm x 2mm) 8-pin DFN package Applications Backplane buffering OC-12 to OC-192 SONET/SDN clock/data distribution All Gigabit Ethernet clock or data distribution Fibre Channel distribution Markets LAN/WAN Enterprise servers ATE Test and measurement United States Patent No. RE44,134 Precision Edge is a registered trademark of Micrel, Inc. M9999-083007-B August 2007 hbwhelp micrel.com or (408) 955-1690Micrel, Inc. SY89850U (1) Ordering Information Part Number Package Operating Range Package Marking Lead Finish Type SY89850UMG DFN-8 Industrial 850U with Pb-Free bar-line indicator NiPdAu Pb-Free (2) SY89850UMGTR DFN-8 Industrial 850U with Pb-Free bar-line indicator NiPdAu Pb-Free Notes: 1. Contact factory for dice availability. Dice are guaranteed at T = 25C, DC Electrical Only. A 2. Tape and Reel. Pin Configuration 8-Pin DFN Pin Description Pin Number Pin Name Pin Function 1, 4 IN, /IN Differential Input: This input pair is the signal to be buffered. These inputs accept AC- or DC-coupled signals as small as 100mV. Each pin of this pair internally terminates to a VT pin through 50. Note that this input will default to an indeterminate state if left open. Please refer to the Input Interface Applications section for more details. 2 VT Input Termination Center-Tap: Each side of the differential input pair terminates to this pin. The VT pin provides a center-tap to a termination network for maximum interface flexibility. See Input Interface Applications section for more details. 3 VREF-AC Reference Output Voltage: This output biases to VCC 1.2V. Connect to VT pin when AC-coupling the input. Bypass with 0.01 F low ESR capacitor to V . CC Maximum sink/source current is 1.5mA. Due to the limited drive capability, the VREF-AC pin is only intended to drive its respective VT pin. See Input Interface Applications section. 5 GND, Ground: Ground pin and exposed pad must be connected to the same ground Exposed Pad plane. 7, 6 Q, /Q Differential 100K LVPECL Output: This LVPECL output is the output of the device. Terminate through 50 to V 2V. See Output Interface Applications section. CC 8 VCC Positive Power Supply: Bypass with 0.1 F//0.01 F low ESR capacitors as close to the VCC pin as possible. M9999-083007-B August 2007 2 hbwhelp micrel.com or (408) 955-1690