Product Information

SY58604UMG TR

SY58604UMG TR electronic component of Microchip

Datasheet
Buffers & Line Drivers 4.25Gbps LVPECL Buffer w/ FSI Inputs

Manufacturer: Microchip
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

2: USD 4.7925 ea
Line Total: USD 9.585

225 - Global Stock
Ships to you between
Fri. 05 Apr to Thu. 11 Apr
MOQ: 2  Multiples: 1
Pack Size: 1
Availability Price Quantity
970 - Global Stock


Ships to you between Fri. 05 Apr to Thu. 11 Apr

MOQ : 50
Multiples : 50

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SY58604UMG TR
Microchip

50 : USD 5.9625
100 : USD 5.675
250 : USD 5.65
500 : USD 5.6
1000 : USD 5.5625
3000 : USD 5.525
5000 : USD 5.475

225 - Global Stock


Ships to you between Fri. 05 Apr to Thu. 11 Apr

MOQ : 1
Multiples : 1

Stock Image

SY58604UMG TR
Microchip

1 : USD 4.7925
10 : USD 4.6966
25 : USD 4.6966
100 : USD 4.6966

3046 - Global Stock


Ships to you between Thu. 11 Apr to Mon. 15 Apr

MOQ : 1
Multiples : 1

Stock Image

SY58604UMG TR
Microchip

1 : USD 6.187
10 : USD 6.164
25 : USD 5.4395
100 : USD 4.9795
1000 : USD 4.9795

225 - Global Stock


Ships to you between Fri. 05 Apr to Thu. 11 Apr

MOQ : 2
Multiples : 1

Stock Image

SY58604UMG TR
Microchip

2 : USD 4.7925
10 : USD 4.6966

970 - Global Stock


Ships to you between Fri. 05 Apr to Thu. 11 Apr

MOQ : 50
Multiples : 50

Stock Image

SY58604UMG TR
Microchip

50 : USD 7.7513

     
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SY58604U 3.2Gbps Precision, LVPECL Buffer with Internal Termination and Fail Safe Input General Description The SY58604U is a 2.5/3.3V, high-speed, fully Precision Edge differential LVPECL buffer optimized to provide only Features 108fs phase jitter. The SY58604U can process clock RMS signals as fast as 2.5GHz or data patterns up to Precision 800mV LVPECL buffer 3.2Gbps. Ultra-low jitter design The differential input includes Micrels unique, 3-pin 108fs phase jitter RMS input termination architecture that interfaces to LVPECL, Guaranteed AC performance over temperature and LVDS or CML differential signals, (AC- or DC-coupled) voltage: as small as 100mV (200mV ) without any level-shifting pp DC-to > 3.2Gbps throughput or termination resistor networks in the signal path. For <350ps typical propagation delay (IN-to-Q) AC-coupled input interface applications, an integrated voltage reference (V ) is provided to bias the V pin. <110ps rise/fall times REF-AC T The output is 800mV LVPECL, with extremely fast Fail Safe Input rise/fall times guaranteed to be less than 110ps. Prevents output from oscillating when input is The SY58604U operates from a 2.5V 5% supply or invalid 3.3V 10% supply and is guaranteed over the full High-speed LVPECL output industrial temperature range (40C to +85C). For 2.5V 5% or 3.3V 10% power supply operation applications that require CML or LVDS outputs, consider Industrial temperature range: 40C to +85C the SY58603U and the SY58605U, buffers with 400mV and 325mV output swings respectively. The SY58604U Available in 8-pin (2mm x 2mm) DFN package is part of Micrels high-speed, Precision Edge product line. Applications Datasheets and support documentation can be found on All SONET clock and data distribution Micrels web site at: www.micrel.com. Fibre Channel clock and data distribution Gigabit Ethernet clock and data distribution Backplane distribution Functional Block Diagram Markets Storage ATE Test and measurement Enterprise networking equipment High-end servers Access Metro area network equipment United States Patent No. RE44,134 Precision Edge is a registered trademark of Micrel, Inc. Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 Micrel, Inc. SY58604U (1) Ordering Information Part Number Package Type Operating Range Package Marking SY58604UMG DFN-8 Industrial 604 with Pb-Free bar-line indicator (2) SY58604UMGTR DFN-8 Industrial 604 with Pb-Free bar-line indicator Notes: 1. Contact factory for die availability. Dice are guaranteed at T = 25C, DC Electricals only. A 2. Tape and Reel. Pin Configuration 8-Pin DFN Pin Description Pin Number Pin Name Pin Function 1, 4 IN, /IN Differential Input: This input pair is the differential signal input to the device. Input accepts DC-Coupled differential signals as small as 100mV (200mVpp). Each pin of this pair internally terminates with 50 to the VT pin. If the input swing falls below a certain threshold (typical 30mV), the Fail Safe Input (FSI) feature will guarantee a stable output by latching the output to its last valid state. See Input Interface Applications subsection for more details. 2 VT Input Termination Center-Tap: Each input terminates to this pin. The VT pin provides a center-tap for each input (IN, /IN) to a termination network for maximum interface flexibility. See Input Interface Applications subsection. 3 VREF-AC Reference Voltage: This output biases to V 1.2V. It is used for AC-coupling inputs CC IN and /IN. Connect VREF-AC directly to the VT pin. Bypass with 0.01F low ESR capacitor to VCC. Maximum sink/source current is 1.5mA. See Input Interface Applications subsection for more details. 5 GND, Ground: Exposed pad must be connected to a ground plane that is the same Exposed pad potential as the ground pin. 6, 7 /Q, Q LVPECL Differential Output Pair: Differential buffered output copy of the input signal. The output swing is typically 800mV. See LVPECL Output Termination subsection. 8 VCC Positive Power Supply: Bypass with 0.1F//0.01F low ESR capacitors as close to the V pin as possible. CC 2 M9999-092911-D September 2011 or (408) 955-1690 hbwhelp micrel.com

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8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

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