AT25M02-SSHM-B

AT25M02 SPI Serial EEPROM 2-Mbit (262,144 x 8) DATASHEET Features Low-voltage and Standard-voltage Operation Available 1.7V (V = 1.7V to 5.5V) CC 2.5V (V = 2.5V to 5.5V) CC Serial Peripheral Interface (SPI) Compatible Interface Supports SPI Modes 0 (0,0) and 3 (1,1) High Speed Operation 5MHz Clock Rate from 1.7V to 5.5V 256-byte Page Write Mode Support Partial Page Writes Allowed Byte Write Operation Supported Self-timed Write Cycle All Write Operations Complete Within 10ms Max Block Write Protection Ability to Protect the Upper Quarter, Upper Half, or the Entire Memory Array Multiple Write Protection Methods Write Protect (WP) Pin and Write Disable instructions for Both Hardware and Software Data Protection High Reliability Endurance: 1,000,000 Write Cycles Data Retention: 40 Years Green Package Options (Lead-free/Halide-free/RoHS Compliant) 8-lead JEDEC SOIC and 8-ball Thin WLCSP Die Sale Options Wafer form, Waffle Pack, and Bumped Die Available Description The Atmel AT25M02 provides 2,097,152 bits of Serial Electrically Erasable Programmable Read-Only Memory (EEPROM) organized as 262,144 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation is essential. The device is available in space saving 8-lead JEDEC SOIC and 8-ball Thin WLCSP packages. In addition, the device operates from 1.7V to 5.5V. The AT25M02 is enabled through the Chip Select pin (CS) and accessed via a 3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All programming cycles are completely self-timed and a separate erase cycle is not required before writing to the device. Atmel-8832C-SEEPROM-AT25M02-Datasheet 012017Table of Contents 1. Pin Configurations and Pinouts . 3 2. Device Block Diagram and Bus Connections . 4 3. Device Operation . 5 3.1 Interfacing the AT25M02 on the SPI Bus 5 3.2 Device Opcodes . 5 3.3 Hold Function . 6 3.4 Write Protection 6 4. Device Commands and Addressing . 7 4.1 Status Register Bit Definition and Function . 7 4.2 Read Status Register (RDSR) and Low Power Write Poll (LPWP) . 8 4.2.1 Read Status Register (RDSR) . 8 4.2.2 Low Power Write Poll (LPWP) . 8 4.3 Write Enable (WREN) and Write Disable (WRDI) 9 4.3.1 Write Enable Instruction (WREN) 9 4.3.2 Write Disable Instruction (WRDI) 9 4.4 Write Status Register (WRSR) . 10 4.4.1 Block Write Protect Function . 10 4.4.2 Write Protect Enable Function 11 5. Read Array Operation 12 6. Write Commands 13 6.1 Byte Write . 13 6.2 Page Write 13 6.2.1 Internal Writing Methodology . 14 6.2.2 Polling Routine . 14 7. Electrical Specifications . 15 7.1 Absolute Maximum Ratings* . 15 7.2 DC and AC Operating Range 15 7.3 DC Characteristics 16 7.4 AC Characteristics 17 7.5 Pin Capacitance 18 7.6 EEPROM Cell Performance Characteristics . 18 7.7 Power-Up Requirements, Reset, and Default Conditions . 18 7.7.1 Device Reset . 18 7.7.2 Software Reset . 19 7.7.3 Device Default State at Power-up . 19 7.7.4 Device Default Condition from Atmel 19 8. Ordering Code Detail 20 9. Ordering Information 20 10. Part Marking Scheme 21 11. Packaging Information . 22 11.1 8S1 8-lead JEDEC SOIC . 22 11.2 8U-10 8-ball WLCSP 23 12. Revision History . 24 2 AT25M02 DATASHEET Atmel-8832C-SEEPROM-AT25M02-Datasheet 012017