Product Information

MLX80104KLQ-DAG-000-SP

MLX80104KLQ-DAG-000-SP electronic component of Melexis

Datasheet
I/O Controller Interface IC LIN Switch Slave - Uni-ROM (SW Version "AG")

Manufacturer: Melexis
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Line Total: USD 6.1373

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MLX80104/5 LIN Slave Controller for Switches Datasheet Features Application Controller GNDA 1 21 AWD o Internal 12 MHz RC-Oscillator IREF 2 20 SW9 o 16-bit MULAN MCU with 16kB ROM or OTP, 512 Byte RAM, 192 SW5 3 19 IO7 Byte EEPROM with ECC MLX80104/5 SW4 4 18 IO0 QFN 5x5 28 SW3 5 17 GNDD LIN Protocol Controller according to LIN 2.x and SAE J2602 TO 6 16 GNDL o Baud rate up to 19.2 kBaud TI1 7 15 LIN o Frame processing o Low interrupt load to the application LIN Transceiver according to LIN 2.x and SAE J2602 o Slew rate control for best EME behaviour o High EMI immunity IO Configuration o 18 fully configurable high current/high voltage inputs/outputs (7mA/26.5V) o Ground shift tolerant I/Os o All IOs configurable pull up or pull down characteristics o Eight PWM outputs (8-bit, 80Hz to 30kHz) o Ten 10-bit ADC channels o Eight Interrupt capable Inputs o Configurable Wake up sources (LIN, IOs, ADC) o Constant current output (2mA) for external low voltage loads via bipolar transistor o IOs fully diagnosable o Integrated window watchdog and additional independent analogue watchdog Voltage Regulator o Low standby current consumption of typ 25A in sleep mode o Over-temperature shutdown, 45V load dump protected Other Features o Automotive Temperature Range of 40C to 125C o Small MLF 5x5 28pin package o Ready-to-use firmware available (UniROM) Order Code Temp. Range Package Delivery Remark MLX80104 KLQ-DAG-000-RE -40 - 125 C QFN 5x5 Reel ROM, See 22 Marking MLX80104 KLW-DAG-000-RE -40 - 125 C QFN 5x5 WF Reel ROM, See 22 Marking MLX80105 KLQ-EAA-000-RE -40 - 125 C QFN 5x5 Reel OTP, See 22 Marking MLX80105 KLW-EAA-000-RE -40 - 125 C QFN 5x5 WF Reel OTP, See 22 Marking Short Description This IC is a fully integrated LIN Slave for matrix switch or single switch Applications in automotive environment. It is suitable for bus systems according to LIN 2.x as well as SAE J2602. The combination of physical layer LIN transceiver and LIN protocol controller along with easy to configure switch inputs and PWM outputs make it possible to develop in a short timeframe simple, but powerful and cheap switch slave nodes for LIN Bus systems. June 2016 MLX80104/5 Datasheet Page 1 of 100 Rev 017 390108010400 TI0 8 28 IO3 IO5 9 27 IO4 IO2 10 26 IO6 SW2 11 25 SW6 SW1 12 24 SW7 SW0 13 23 VS IO1 14 22 SW8MLX80104/5 LIN Slave Controller for Switches Datasheet Contents 1. General Overview .............................................................................................................................................. 7 1.1 Block Diagram .................................................................................................................................................. 7 2. Electrical Characteristics .................................................................................................................................... 8 2.1 Absolute Maximum Ratings ............................................................................................................................. 8 2.2 Operating Conditions ....................................................................................................................................... 9 2.3 Static Characteristics ....................................................................................................................................... 9 2.4 Dynamic Characteristics ................................................................................................................................ 12 3. MULAN MULtiple CPU with Analog and Network support .............................................................................13 3.1 General .......................................................................................................................................................... 13 3.2 MULAN Block Diagram .................................................................................................................................. 13 3.3 CPU Timing .................................................................................................................................................... 14 3.4 MLX16-8 ......................................................................................................................................................... 14 4. Address Space ..................................................................................................................................................15 4.1 Memory Mapping .......................................................................................................................................... 15 4.2 RAM Sharing .................................................................................................................................................. 16 4.3 ROM/OTP Sharing .......................................................................................................................................... 16 4.4 EEPROM ......................................................................................................................................................... 17 4.4.1. Static/dynamic Characteristics ...............................................................................................................................17 4.4.2. Write Timing ..........................................................................................................................................................17 4.4.3. Read timing ............................................................................................................................................................17 4.4.4. Read .......................................................................................................................................................................18 4.4.5. Write/Erase ............................................................................................................................................................19 4.5 OTP (MLX80105 only) .................................................................................................................................... 21 5. IO Registers ......................................................................................................................................................22 5.1 General .......................................................................................................................................................... 22 5.2 System Protected ports .................................................................................................................................. 22 5.3 Standard ports ............................................................................................................................................... 24 6. IO Ports ............................................................................................................................................................25 6.1 Common Features of Pin SWx and IOx .......................................................................................................... 25 6.1.1. Pin structure ..........................................................................................................................................................26 6.1.2. Configuration Register Central Current Source ......................................................................................................27 6.1.3. Configuration Register SWx ...................................................................................................................................28 6.1.4. Configuration Register IOx .....................................................................................................................................29 6.1.5. Switch current generation .....................................................................................................................................30 6.1.6. The switch detection thresholds ............................................................................................................................31 6.1.7. Switch diagnosis .....................................................................................................................................................33 6.1.8. Switch Configuration in sleep mode ......................................................................................................................36 6.2 Additional Operation Modes SWx Ports ........................................................................................................ 37 6.3 Additional Operation Modes IOx Ports .......................................................................................................... 40 6.4 The IREF pin ................................................................................................................................................... 42 June 2016 MLX80104/5 Datasheet Page 2 of 100 Rev 017 390108010400

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
MEL
MELEXIS
Melexis Inc
Melexis Technologies NV

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