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DS1961S-F3+

DS1961S-F3+ electronic component of Analog Devices

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iButtons & Accessories 1kb Protected EEPROM iButton with SHA-1 Engine

Manufacturer: Analog Devices
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 8.204 ea
Line Total: USD 8.2

0 - Global Stock
MOQ: 1  Multiples: 1
Pack Size: 1
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Ships to you between Thu. 02 May to Mon. 06 May

MOQ : 1
Multiples : 1

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DS1961S-F3+
Analog Devices

1 : USD 8.204
10 : USD 5.8968
25 : USD 5.7834
50 : USD 5.7456
100 : USD 4.9552
250 : USD 4.9309
500 : USD 4.6402
1000 : USD 4.4948

     
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DS1961S 1kb Protected EEPROM iButton With SHA-1 Engine www.maxim-ic.com Button Shape is Self-Aligning with Cup- SPECIAL FEATURES Shaped Probes 1128 Bits of 5V EEPROM Memory Durable Stainless-Steel Case Engraved with Partitioned into Four Pages of 256 Bits, a 64- Registration Number Withstands Harsh Bit Write-Only Secret, and up to Five Environments General-Purpose Read/Write Registers Easily Affixed with Self-Stick Adhesive Write Access Requires Knowledge of the Backing, Latched by its Flange, or Locked Secret and the Capability of Computing and with a Ring Pressed onto its Rim Transmitting a 160-Bit MAC (Message Presence Detector Acknowledges when Authentication Code) as Authorization Reader First Applies Voltage Secret and Data Memory can be Write- Meets UL 913 (4th Edit.). Intrinsically Safe Protected (All or Page 0 Only) or put in Apparatus: Approved Under Entity Concept EPROM-Emulation Mode (Write to 0, Page for use in Class I, Division 1, Groups A, B, C, 1) and D Locations (Application Pending) On-Chip, 512-Bit SHA-1 Engine to Compute 160-Bit MACs and Generate Secrets Reads and Writes Over a Wide 2.8V to 5.25V F5 MicroCan Voltage Range from -40C to +85C 5.89 Communicates to Host with a Single Digital 0.36 0.51 Signal at 14.1kbps using 1-Wire Protocol 1993 16.25 On-Chip, 16-Bit Cyclic Redundancy Check YYWW REGISTERED RR (CRC) Generator for Safeguarding Data xx 33 17.35 Transfers 000000FBD8B3 Overdrive Mode Boosts Communication Speed to 125kbps Operating Temperature Range from -40C to IO +85C GND Minimum 10 Years of Data Retention at +85C F3 MicroCan 3.10 COMMON iButton FEATURES 0.36 0.51 Unique, Factory-Lasered and Tested 64-Bit Registration Number (8-Bit Family Code + 1993 16.25 48-Bit Serial Number + 8-Bit CRC Tester) YYWW REGISTERED RR Assures Absolute Traceability Because No 33 xx 17.35 Two Parts are Alike 000000FBC52B Multidrop Controller for 1-Wire Net Digital Identification and Information by Momentary Contact IO Chip-Based Data Carrier Compactly Stores GND Information All dimensions are shown in millimeters. Data can be Accessed While Affixed to Object 1 of 36 092302 iButton, 1-Wire, and MicroCan are registered trademarks of Dallas Semiconductor.DS1961S ORDERING INFORMATION EXAMPLES OF ACCESSORIES DS1961S-F5 F5 iButton DS1963S SHA Coprocessor and Button DS1961S-F3 F3 iButton DS9096P Self-Stick Adhesive Pad DS9101 Multipurpose Clip DS9093RA Mounting Lock Ring DS9093A Snap-In Fob DS9092 iButton Probe iButton DESCRIPTION The DS1961S combines 1024 bits of EEPROM, a 64-bit secret, an 8-byte register/control page with up to five user-read/write bytes, a 512-bit SHA-1 engine, and a fully featured 1-Wire interface in a rugged iButton. Data is transferred serially through the 1-Wire protocol, which requires only a single data lead and a ground return. The DS1961S has an additional memory area called the scratchpad that acts as a buffer when writing to the main memory, the register page, or when installing a new secret. Data is first written to the scratchpad from where it can be read back. After the data has been verified, a copy scratchpad command transfers the data to its final memory location, provided that the DS1961S receives a matching 160-bit MAC. The computation of the MAC involves the secret and additional data stored in the DS1961S including the devices identity register. Only a new secret can be loaded without providing a MAC. The SHA-1 engine can also be activated to compute 160-bit MACs when reading a memory page or to compute a new secret, instead of loading it. The DS1961S understands a unique commandRefresh Scratchpad Proper use of a refresh sequence after a copy scratchpad operation reduces the number of weak bit failures in a touch environment (see the Writing with Verification section). The refresh sequence also provides a means to restore functionality in a device with bits in a weak state. Each DS1961S has its own 64-bit ROM registration number that is factory lasered into the chip to provide a guaranteed unique identity for absolute traceability. The durable stainless-steel package is highly resistant to environmental hazards such as dirt, moisture, and shock. Its compact coin-shaped profile is self-aligning with mating receptacles, allowing the DS1961S to be easily used by human operators. Accessories permit the DS1961S to be mounted on almost any surface including plastic key fobs and photo-ID badges. APPLICATIONS The DS1961S can be used for different purposes such as secure access control, user/product authentica- tion, after-market management of consumables, and as monetary tokens in electronic payment systems. As carrier of electronic cash (eCash), the DS1961S can store up to three monetary files orpurse of a single service provider, which make the device well suited for company-sized single-secret applications such as cafeteria, copy machines, and access control at entertainment parks or private clubs. For increased security or if the processing power of the host microcontroller is insufficient, a DS1963S can be used as secure coprocessor to verify MACs generated by the DS1961S or to compute MACs needed for writing to the DS1961S. OVERVIEW The block diagram in Figure 1 shows the relationships between the major control and memory sections of the DS1961S. The DS1961S has five main data components: 1) 64-bit lasered ROM, 2) 64-bit scratchpad, 3) four 32-byte pages of EEPROM, 4) 64-bit register page, 5) 64-bit secrets memory, and 6) a 512-bit 2 of 36

Tariff Desc

8542.32.00 33 No ..Memory cards (other than "smart" cards and SIMM), which incorporate E2PROM, SRAM, DRAM or flash memory (for example, for PCMCIA applications)
AD4
ANALOG DEVICES
Analog Devices Hittite
ANALOG DEVICES (LINEAR TECHNOLOGY)
ANALOG DEVICES (MAXIM INTEGRATED)
ANALOG DEVICES (TRINAMIC)
Analog Devices / Hittite
Analog Devices / Linear Technology
Analog Devices Inc
Analog Devices Inc.
Analog Devices, Inc.
DA4
Dallas
DALLAS / MAXIM
Dallas Semiconductor (VA)
LINEAR
LINEAR TECH
Linear Technology
Linear Technology (part of ADI)
LT
LT4
MAXIM
Maxim Integrated
MAXIM INTEGRATED / ANALOG DEVICES
Maxim Integrated Products
MAXIM-DALLAS
MX4
Technology
Trinamic
TRINAMIC / ANALOG DEVICES
Trinamic Motion Control
Trinamic Motion Control GmbH

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