Product Information

MC56F8323MFBE

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Datasheet
Digital Signal Processors & Controllers - DSP, DSC 16 BIT HYBRID CONTROLLER
Manufacturer: Freescale



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11 - Global Stock


Ships to you between Tue. 27 Apr to Thu. 29 Apr

MOQ : 1
Multiples : 1

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MC56F8323MFBE
Freescale

1 : $ 30.9474
10 : $ 30.0947
100 : $ 29.7947
250 : $ 29.4947
1000 : $ 29.4789

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Manufacturer
Freescale
Product Category
Digital Signal Processors & Controllers - DSP, DSC
RoHS - XON
Y Icon ROHS
Core
56800E
Data Bus Width
16 bit
Program Memory Size
32 Kb
Data RAM Size
8 Kb
Maximum Clock Frequency
60 Mhz
Number of I/Os
27 I/O
Number of Timers
2
Operating Supply Voltage
3 v to 3.6 V
Maximum Operating Temperature
+125 C
Package / Case
LQFP-64
Mounting Style
Smd/Smt
Packaging
Tray
Product
Dscs
Program Memory Type
Flash
Series
56F832x_812X
Type
56800E
Brand
Freescale Semiconductor
Data Rom Size
8 Kb
Family / Core
56800E
Interface Type
Can, Sci, Spi
Minimum Operating Temperature
- 40 C
Number Of Programmable I/Os
27
On-Chip Adc
Yes
Processor Series
Mc56f83xx
Factory Pack Quantity :
800
Height
1.45 mm
Length
10 mm
Adc Resolution
12 Bit
Cnhts
8542319000
Hts Code
8542310001
Mxhts
85423199
Number Of Timers/Counters
2 Timer
Product Type
Dsp - Digital Signal Processors & Controllers
Qualification
Aec-Q100
Subcategory
Embedded Processors & Controllers
LoadingGif
Image
Mfr. Part No.
Description
Stock
Digital Signal Processors & Controllers - DSP, DSC 16 BIT HYBRID CONTROLLER
3
Digital Signal Processors & Controllers - DSP, DSC 16 BIT HYBRID CONTROLLER
250
Digital Signal Processors & Controllers - DSP, DSC 16 BIT HYBRID CONTROLLER
121
Digital Signal Processors & Controllers - DSP, DSC 16 BIT HYBRID CNTRLR
54
Digital Signal Processors & Controllers - DSP, DSC 60MHz/60MIPS
351
Image
Mfr. Part No.
Description
Stock
Digital Signal Processors & Controllers - DSP, DSC 16 BIT HYBRID CNTRLR
1625
Digital Signal Processors & Controllers - DSP, DSC 32BIT CORE,64KB FLASH
380
Digital Signal Processors & Controllers - DSP, DSC DSC 64 LQFP 48K FL
227
Digital Signal Processors & Controllers - DSP, DSC DSC 48 LQFP 48K FL
730
Digital Signal Processors & Controllers - DSP, DSC DSC 44 LQFP 48K FL
165

56F8323/56F8123 Data Sheet Preliminary Technical Data 56F8300 16-bit Digital Signal Controllers MC56F8323 Rev. 17 04/2007 freescale.com56F8323/56F8123 Data Sheet Preliminary Technical Data 56F8300 16-bit Digital Signal Controllers MC56F8323 Rev. 17 04/2007 freescale.com Document Revision History Version History Description of Change Rev 1.0 Pre-Release version, Alpha customers only Rev 2.0 Initial Public Release Rev 3.0 Corrected typo in Table 10-4, Flash Endurance is 10,000 cycles. Addressed additional grammar issues. Rev 4.0 Added Package Pins to GPIO Table in Section 8. Removed reference to pin group 9 in Table 10-5. Replacing TBD Typical Min with values in Table 10-17. Editing grammar, spelling, consistency of language throughout family. Updated values in Regulator Parameters, Table 10-9, External Clock Operation Timing Requirements Table 10-13, SPI Timing, Table 10-18, ADC Parameters, Table 10-24, and IO Loading Coefficients at 10MHz, Table 10-25. Rev 5.0 Updated values in Power-On Reset Low Voltage, Table 10-6. Rev 6.0 Correcting package pin numbers in Table 2-2, PhaseA0 changed from 38 to 52, PhaseB0 changed from 37 to 51, Index0 changed from 36 to 50, and Home0 changed from 35 to 49. All pin changes in Table 2-2 were do to data entry errors - This package pin-out has not changed Rev 7.0 Added Part 4.8, added addition text to Part 6.9 on POR reset, added the word ?access? to FM Error Interrupt in Table 4-3, removed min and max numbers; only documenting Typ. numbers for LVI in Table 10-6. Rev 8.0 Updated numbers in Table 10-7 and Table 10-8 with more recent data. Corrected typo in Table 10-3 in Pd characteristics. Rev 9.0 Replace any reference to Flash Interface Unit with Flash Memory Module; changed example in Part 2.2; added note on V and V in Table 2-2 and Table 11-1; added note to Vcap pin in REFH REFLO Table 2-2; corrected typo FIVAL1 and FIVAH1 in Table 4-12; removed unneccessary notes in Table 10-12; corrected temperature range in Table 10-14; added ADC calibration information to Table 10-24 and new graphs in Figure 10-21. Rev 10.0 Clarification to Table 10-23, corrected Digital Input Current Low (pull-up enabled) numbers in Table 10-5. Removed text and Table 10-2; replaced with note to Table 10-1. Rev. 11.0 Added 56F8123 information; edited to indicate differences in 56F8323 and 56F8123.Reformatted for Freescale look and feel. Updated Temperature Sensor and ADC tables, then updated balance of electrical tables for consistency throughout the family. Clarified I/O power description in Table 2-2, added note to Table 10-7 and clarified Section 12.3 . Rev 12.0 Added output voltage maximum value and note to clarify in Table 10-1; also removed overall life expectancy note, since life expectancy is dependent on customer usage and must be determined by reliability engineering. Clarified value and unit measure for Maximum allowed P in Table 10-3. D Corrected note about average value for Flash Data Retention in Table 10-4. Added new RoHS-compliant orderable part numbers in Table 13-1. Rev 13.0 Deleted formula for Max Ambient Operating Temperature (Automotive) and Max Ambient Operating Temperature (Industrial) in Table 10-4. Added RoHS-compliance and ?pb-free? language to back cover. 56F8323 Technical Data, Rev. 17 2 Freescale Semiconductor Preliminary56F8323/56F8123 Data Sheet Preliminary Technical Data 56F8300 16-bit Digital Signal Controllers MC56F8323 Rev. 17 04/2007 freescale.com56F8323/56F8123 Data Sheet Preliminary Technical Data 56F8300 16-bit Digital Signal Controllers MC56F8323 Rev. 17 04/2007 freescale.com Document Revision History Version History Description of Change Rev 1.0 Pre-Release version, Alpha customers only Rev 2.0 Initial Public Release Rev 3.0 Corrected typo in Table 10-4, Flash Endurance is 10,000 cycles. Addressed additional grammar issues. Rev 4.0 Added Package Pins to GPIO Table in Section 8. Removed reference to pin group 9 in Table 10-5. Replacing TBD Typical Min with values in Table 10-17. Editing grammar, spelling, consistency of language throughout family. Updated values in Regulator Parameters, Table 10-9, External Clock Operation Timing Requirements Table 10-13, SPI Timing, Table 10-18, ADC Parameters, Table 10-24, and IO Loading Coefficients at 10MHz, Table 10-25. Rev 5.0 Updated values in Power-On Reset Low Voltage, Table 10-6. Rev 6.0 Correcting package pin numbers in Table 2-2, PhaseA0 changed from 38 to 52, PhaseB0 changed from 37 to 51, Index0 changed from 36 to 50, and Home0 changed from 35 to 49. All pin changes in Table 2-2 were do to data entry errors - This package pin-out has not changed Rev 7.0 Added Part 4.8, added addition text to Part 6.9 on POR reset, added the word ?access? to FM Error Interrupt in Table 4-3, removed min and max numbers; only documenting Typ. numbers for LVI in Table 10-6. Rev 8.0 Updated numbers in Table 10-7 and Table 10-8 with more recent data. Corrected typo in Table 10-3 in Pd characteristics. Rev 9.0 Replace any reference to Flash Interface Unit with Flash Memory Module; changed example in Part 2.2; added note on V and V in Table 2-2 and Table 11-1; added note to Vcap pin in REFH REFLO Table 2-2; corrected typo FIVAL1 and FIVAH1 in Table 4-12; removed unneccessary notes in Table 10-12; corrected temperature range in Table 10-14; added ADC calibration information to Table 10-24 and new graphs in Figure 10-21. Rev 10.0 Clarification to Table 10-23, corrected Digital Input Current Low (pull-up enabled) numbers in Table 10-5. Removed text and Table 10-2; replaced with note to Table 10-1. Rev. 11.0 Added 56F8123 information; edited to indicate differences in 56F8323 and 56F8123.Reformatted for Freescale look and feel. Updated Temperature Sensor and ADC tables, then updated balance of electrical tables for consistency throughout the family. Clarified I/O power description in Table 2-2, added note to Table 10-7 and clarified Section 12.3 . Rev 12.0 Added output voltage maximum value and note to clarify in Table 10-1; also removed overall life expectancy note, since life expectancy is dependent on customer usage and must be determined by reliability engineering. Clarified value and unit measure for Maximum allowed P in Table 10-3. D Corrected note about average value for Flash Data Retention in Table 10-4. Added new RoHS-compliant orderable part numbers in Table 13-1. Rev 13.0 Deleted formula for Max Ambient Operating Temperature (Automotive) and Max Ambient Operating Temperature (Industrial) in Table 10-4. Added RoHS-compliance and ?pb-free? language to back cover. 56F8323 Technical Data, Rev. 17 2 Freescale Semiconductor Preliminary Document Revision History Version History Description of Change Rev 14.0 Added information/corrected state during reset in Table 2-2. Clarified external reference crystal frequency for PLL in Table 10-14 by increasing maximum value to 8.4MHz. Rev 15.0 Replaced ?Tri-stated? with an explanation in State During Reset column in Table 2-2. ? Added the following note to the description of the TMS signal in Table 2-2: Rev. 16 Note: Always tie the TMS pin to V through a 2.2K resistor. DD ? Added the following note to the description of the TRST signal in Table 2-2: Note: For normal operation, connect TRST directly to V . If the design is to be used in a debugging SS environment, TRST may be tied to V through a 1K resistor. SS Rev. 17 Changed the ?Frequency Accuracy? specification in Table 10-16 (was ?2.0%, is +2 / -3%). Please see http://www.freescale.com for the most current data sheet revision. 56F8323 Technical Data, Rev. 17 Freescale Semiconductor 3 Preliminary56F8323/56F8123 Data Sheet Preliminary Technical Data 56F8300 16-bit Digital Signal Controllers MC56F8323 Rev. 17 04/2007 freescale.com56F8323/56F8123 Data Sheet Preliminary Technical Data 56F8300 16-bit Digital Signal Controllers MC56F8323 Rev. 17 04/2007 freescale.com Document Revision History Version History Description of Change Rev 1.0 Pre-Release version, Alpha customers only Rev 2.0 Initial Public Release Rev 3.0 Corrected typo in Table 10-4, Flash Endurance is 10,000 cycles. Addressed additional grammar issues. Rev 4.0 Added Package Pins to GPIO Table in Section 8. Removed reference to pin group 9 in Table 10-5. Replacing TBD Typical Min with values in Table 10-17. Editing grammar, spelling, consistency of language throughout family. Updated values in Regulator Parameters, Table 10-9, External Clock Operation Timing Requirements Table 10-13, SPI Timing, Table 10-18, ADC Parameters, Table 10-24, and IO Loading Coefficients at 10MHz, Table 10-25. Rev 5.0 Updated values in Power-On Reset Low Voltage, Table 10-6. Rev 6.0 Correcting package pin numbers in Table 2-2, PhaseA0 changed from 38 to 52, PhaseB0 changed from 37 to 51, Index0 changed from 36 to 50, and Home0 changed from 35 to 49. All pin changes in Table 2-2 were do to data entry errors - This package pin-out has not changed Rev 7.0 Added Part 4.8, added addition text to Part 6.9 on POR reset, added the word ?access? to FM Error Interrupt in Table 4-3, removed min and max numbers; only documenting Typ. numbers for LVI in Table 10-6. Rev 8.0 Updated numbers in Table 10-7 and Table 10-8 with more recent data. Corrected typo in Table 10-3 in Pd characteristics. Rev 9.0 Replace any reference to Flash Interface Unit with Flash Memory Module; changed example in Part 2.2; added note on V and V in Table 2-2 and Table 11-1; added note to Vcap pin in REFH REFLO Table 2-2; corrected typo FIVAL1 and FIVAH1 in Table 4-12; removed unneccessary notes in Table 10-12; corrected temperature range in Table 10-14; added ADC calibration information to Table 10-24 and new graphs in Figure 10-21. Rev 10.0 Clarification to Table 10-23, corrected Digital Input Current Low (pull-up enabled) numbers in Table 10-5. Removed text and Table 10-2; replaced with note to Table 10-1. Rev. 11.0 Added 56F8123 information; edited to indicate differences in 56F8323 and 56F8123.Reformatted for Freescale look and feel. Updated Temperature Sensor and ADC tables, then updated balance of electrical tables for consistency throughout the family. Clarified I/O power description in Table 2-2, added note to Table 10-7 and clarified Section 12.3 . Rev 12.0 Added output voltage maximum value and note to clarify in Table 10-1; also removed overall life expectancy note, since life expectancy is dependent on customer usage and must be determined by reliability engineering. Clarified value and unit measure for Maximum allowed P in Table 10-3. D Corrected note about average value for Flash Data Retention in Table 10-4. Added new RoHS-compliant orderable part numbers in Table 13-1. Rev 13.0 Deleted formula for Max Ambient Operating Temperature (Automotive) and Max Ambient Operating Temperature (Industrial) in Table 10-4. Added RoHS-compliance and ?pb-free? language to back cover. 56F8323 Technical Data, Rev. 17 2 Freescale Semiconductor Preliminary56F8323/56F8123 Data Sheet Preliminary Technical Data 56F8300 16-bit Digital Signal Controllers MC56F8323 Rev. 17 04/2007 freescale.com56F8323/56F8123 Data Sheet Preliminary Technical Data 56F8300 16-bit Digital Signal Controllers MC56F8323 Rev. 17 04/2007 freescale.com Document Revision History Version History Description of Change Rev 1.0 Pre-Release version, Alpha customers only Rev 2.0 Initial Public Release Rev 3.0 Corrected typo in Table 10-4, Flash Endurance is 10,000 cycles. Addressed additional grammar issues. Rev 4.0 Added Package Pins to GPIO Table in Section 8. Removed reference to pin group 9 in Table 10-5. Replacing TBD Typical Min with values in Table 10-17. Editing grammar, spelling, consistency of language throughout family. Updated values in Regulator Parameters, Table 10-9, External Clock Operation Timing Requirements Table 10-13, SPI Timing, Table 10-18, ADC Parameters, Table 10-24, and IO Loading Coefficients at 10MHz, Table 10-25. Rev 5.0 Updated values in Power-On Reset Low Voltage, Table 10-6. Rev 6.0 Correcting package pin numbers in Table 2-2, PhaseA0 changed from 38 to 52, PhaseB0 changed from 37 to 51, Index0 changed from 36 to 50, and Home0 changed from 35 to 49. All pin changes in Table 2-2 were do to data entry errors - This package pin-out has not changed Rev 7.0 Added Part 4.8, added addition text to Part 6.9 on POR reset, added the word ?access? to FM Error Interrupt in Table 4-3, removed min and max numbers; only documenting Typ. numbers for LVI in Table 10-6. Rev 8.0 Updated numbers in Table 10-7 and Table 10-8 with more recent data. Corrected typo in Table 10-3 in Pd characteristics. Rev 9.0 Replace any reference to Flash Interface Unit with Flash Memory Module; changed example in Part 2.2; added note on V and V in Table 2-2 and Table 11-1; added note to Vcap pin in REFH REFLO Table 2-2; corrected typo FIVAL1 and FIVAH1 in Table 4-12; removed unneccessary notes in Table 10-12; corrected temperature range in Table 10-14; added ADC calibration information to Table 10-24 and new graphs in Figure 10-21. Rev 10.0 Clarification to Table 10-23, corrected Digital Input Current Low (pull-up enabled) numbers in Table 10-5. Removed text and Table 10-2; replaced with note to Table 10-1. Rev. 11.0 Added 56F8123 information; edited to indicate differences in 56F8323 and 56F8123.Reformatted for Freescale look and feel. Updated Temperature Sensor and ADC tables, then updated balance of electrical tables for consistency throughout the family. Clarified I/O power description in Table 2-2, added note to Table 10-7 and clarified Section 12.3 . Rev 12.0 Added output voltage maximum value and note to clarify in Table 10-1; also removed overall life expectancy note, since life expectancy is dependent on customer usage and must be determined by reliability engineering. Clarified value and unit measure for Maximum allowed P in Table 10-3. D Corrected note about average value for Flash Data Retention in Table 10-4. Added new RoHS-compliant orderable part numbers in Table 13-1. Rev 13.0 Deleted formula for Max Ambient Operating Temperature (Automotive) and Max Ambient Operating Temperature (Industrial) in Table 10-4. Added RoHS-compliance and ?pb-free? language to back cover. 56F8323 Technical Data, Rev. 17 2 Freescale Semiconductor Preliminary Document Revision History Version History Description of Change Rev 14.0 Added information/corrected state during reset in Table 2-2. Clarified external reference crystal frequency for PLL in Table 10-14 by increasing maximum value to 8.4MHz. Rev 15.0 Replaced ?Tri-stated? with an explanation in State During Reset column in Table 2-2. ? Added the following note to the description of the TMS signal in Table 2-2: Rev. 16 Note: Always tie the TMS pin to V through a 2.2K resistor. DD ? Added the following note to the description of the TRST signal in Table 2-2: Note: For normal operation, connect TRST directly to V . If the design is to be used in a debugging SS environment, TRST may be tied to V through a 1K resistor. SS Rev. 17 Changed the ?Frequency Accuracy? specification in Table 10-16 (was ?2.0%, is +2 / -3%). Please see http://www.freescale.com for the most current data sheet revision. 56F8323 Technical Data, Rev. 17 Freescale Semiconductor 3 Preliminary

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Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Monolithic integrated circuits Digital.
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