1300 Henley Court Pullman, WA 99163 509.334.6306 www.digilentinc.com NetFPGA-1G-CML Board Reference Manual Revised April 8, 2016 This manual applies to the NetFPGA-1G-CML rev. F Overview The NetFPGA-1G-CML is a versatile, low-cost network hardware development platform featuring a Xilinx Kintex- 7 XC7K325T FPGA and includes four Ethernet interfaces capable of negotiating up to 1 GB/s connections. 512 MB of 800 MHz DDR3 can support high-throughput packet buffering while 4.5 MB of QDRII+ can maintain low-latency access to high demand data, like routing tables. Rapid boot configuration is supported by a 128 MB BPI Flash, which is also available for non-volatile storage applications. The standard PCIe form factor supports high speed x4 Gen 2 interfacing. The FMC carrier connector provides a convenient expansion interface for extending card functionality via Select I/O and GTX serial interfaces. The FMC connector can support SATA-II data rates for network storage applications. The FMC connector can also be used to extend functionality via a wide variety of other cards designed for communication, measurement, and control. Xilinx Kintex-7 XC7K325T-1FFG676 FPGA Low-jitter 200 MHz oscillator Four 10/100/1000 Ethernet PHYs with RGMII X4 Gen 2 PCI Express X16 4.5 MB QDRII+ static RAM (450 MHz) X8 512 MB DDR3 dynamic RAM (800 MHz) 1-Gbit BPI Flash SD card slot 32-bit PIC microcontroller USB microcontroller Real time clock Crypto-authentication chip High pin count FMC connector (VITA 57) with 100 Select-IO and 4 GTX serial pairs Two Pmod ports Four on-board LEDs and four on-board The NetFPGA-1G-CML board. general-purpose buttons The NetFPGA-1G-CML is designed to support the Stanford NetFPGA architecture with reference designs available through the NetFPGA GitHub Organization (www.github.com/organizations/NetFPGA). It is fully compatible with Xilinx Vivado and ISE Design Suites as well as Xilinx SDK for embedded software design. Copyright Digilent, Inc. All rights reserved. DOC : 6015-502-001 Page 1 of 21 Other product and company names mentioned may be trademarks of their respective owners. NetFPGA-1G-CML Board Reference Manual The Kintex-7 XC7K325T-1FFG676 FPGA has ample logic and I/O capacity for supporting a wide range of designs with the following capabilities: 50,950 slices, each containing four 6- input LUTs and eight flip-flops Over 16 Mbit of fast on-chip block RAM Ten clock management tiles with one PLL and one mixed-mode clock manager each 840 DSP slices Integrated PCI Express Integrated AES bitstream encryption and SHA-256 authentication with battery- backed encryption key 400 Select I/O ports (250 high range, 150 high speed) Eight 6.6 Gb/s GTX serial transceivers 1 FPGA Configuration The system logic configuration is stored within the FPGA in SRAM-based memory cells. This data defines the FPGA s logic functions and circuit connections, but it is volatile since it remains valid only as long as power is applied. Because of this, the device is configured (i.e., programmed) every time it is turned-on. In addition, it may also be re-configured at any time power is applied. Once power is removed, the most recently programmed logic configuration is lost. The configuration data is commonly called a bitstream which is most often contained in files of type.bi or.mc. These files may be created several different ways using Xilinx development software. The FPGA may be configured from three different sources. These include the on-board BPI flash, an off-board USB flash drive, or via a PC. The NetFPGA-1G follows a specific configuration sequence when it powers up and comes out of reset. If a validdownload.bi file is detected on an attached UBS flash drive, that bitstream will be used to program the FPGA. The flash drive must be FAT formatted, contain a singledownload.bi file, and be attached to the USB-HOST port (J13) with jumper JP4 in place. If no flash drive bitstream is detected, an attempt will be made to configure the device from the on-board BPI flash address 0x0. If no flash bitstream is available, the board idles until it is programmed from a PC. PC programming can be done either via a USB cable connected to the USB PROG port (J12), or a JTAG programming cable connected to the Xilinx PROG CABLE port (J15). Any flash drive bitstreams that are not built for the Xilinx XC7K325T FPGA will be ignored. This power-on programming sequence can be re- initiated at any time after power is applied by depressing the red PROG button (BTN5). Both Digilent and Xilinx distribute free software that can be used to transfer bitstreams from a PC as well as create bitstream files to load via a flash drive. Digilent s Adept and Xilinx s iMPACT applications can directly program the FPGA using a .bit file a standard USB A to Micro B cable connected to J12 or through any of several Digilent JTAG programming cables connected to J15. The on-board BPI flash is programmed via similar means. When Copyright Digilent, Inc. All rights reserved. Page 2 of 21 Other product and company names mentioned may be trademarks of their respective owners.