Product Information

S29AL032D90BFI032

S29AL032D90BFI032 electronic component of Infineon

Datasheet
NOR Flash Parallel 3V/3.3V 32M-bit 4M x 8/2M x 16 90ns 48-Pin FBGA T/R

Manufacturer: Infineon
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

600: USD 3.65 ea
Line Total: USD 2190

9894 - Global Stock
Ships to you between
Thu. 04 Apr to Wed. 10 Apr
MOQ: 600  Multiples: 600
Pack Size: 600
Availability Price Quantity
9894 - Global Stock


Ships to you between Thu. 04 Apr to Wed. 10 Apr

MOQ : 600
Multiples : 600
600 : USD 4.875
601 : USD 2.925
1201 : USD 2.8125
3001 : USD 2.7125
7801 : USD 2.6125

9894 - Global Stock


Ships to you between Thu. 04 Apr to Wed. 10 Apr

MOQ : 600
Multiples : 600
600 : USD 3.65
601 : USD 2.925
1201 : USD 2.8125
3001 : USD 2.7125
7801 : USD 2.6125

     
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Programmable
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Rad Hardened
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S29AL032D 32 Mbit, 3 V, Flash 4 M x 8-Bit Uniform Sector 4 M x 8-Bit/2 M x 16-Bit Boot Sector This product has been retired and is not recommended for designs. For new and current designs, the S29GL064S supersedes the S29AL032D. This is the factory-recommended migration path. Please refer to the S29GL064S data sheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only. Distinctive Characteristics Architectural Advantages Performance Characteristics Single power supply operation High performance Full voltage range: 2.7 to 3.6 volt read and write operations for Access times as fast as 70 ns battery-powered applications Ultra low power consumption (typical values at 5 MHz) Manufactured on 200-nm process technology 200 nA Automatic Sleep mode current Fully compatible with 0.23 m Am29LV320D, 0.32 m 200 nA standby mode current Am29LV033C, and 0.33 m MBM29LV320E devices 9 mA read current Flexible sector architecture 20 mA program/erase current Boot sector models: Eight 8-Kbyte sectors sixty-three 64-Kbyte Cycling endurance: 1,000,000 cycles per sector typical sectors top or bottom boot block configurations available Data retention: 20 years typical Uniform sector models: Sixty-four 64-Kbyte sectors Sector Protection features Software Features A hardware method of locking a sector to prevent any program or CFI (Common Flash Interface) compliant erase operations within that sector Provides device-specific information to the system, allowing host Sectors can be locked in-system or via programming equipment software to easily reconfigure for different Flash devices Temporary Sector Unprotect feature allows code changes in Erase Suspend/Erase Resume previously locked sectors Suspends an erase operation to read data from, or program data Unlock Bypass Program Command to, a sector that is not being erased, then resumes the erase Reduces overall programming time when issuing multiple program operation command sequences Data Polling and toggle bits Secured Silicon Sector Provides a software method of detecting program or erase 128-word sector for permanent, secure identification through an 8- operation completion word random Electronic Serial Number Unlock Bypass Program Command May be programmed and locked at the factory or by the customer Reduces overall programming time when issuing multiple program Accessible through a command sequence command sequences Compatibility with JEDEC standards Pinout and software compatible with single-power supply Flash Hardware Features Superior inadvertent write protection Ready/Busy pin (RY/BY ) Provides a hardware method of detecting program or erase cycle Package Options completion 48-ball FBGA Hardware reset pin (RESET ) 48-pin TSOP Hardware method to reset the device to reading array data 40-pin TSOP WP /ACC input pin Write protect (WP ) function allows protection of two outermost boot sectors (boot sector models only), regardless of sector protect status Acceleration (ACC) function provides accelerated program times Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-02003 Rev. *B Revised January 08, 2016 Not Recommended for New DesignS29AL032D General Description The S29AL032D is a 32-megabit, 3.0 volt-only flash memory device, organized as 2,097,152 words of 16 bits each or 4,194,304 bytes of 8 bits each. Word mode data appears on DQ0-DQ15 byte mode data appears on DQ0-DQ7. The device is designed to be programmed in-system with the standard 3.0 volt VCC supply, and can also be programmed in standard EPROM programmers. The device is available with access times as fast as 70 ns. The devices are offered in 40-pin TSOP, 48-pin TSOP and 48-ball FBGA packages. Standard control pins- chip enable (CE ), write enable (WE ), and output enable (OE )-control normal read and write operations, and avoid bus contention issues. The device requires only a single 3.0 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the pro-gram and erase operations. S29AL032D Features The Secured Silicon Sector is an extra sector capable of being permanently locked by Spansion or customers. The Secured Silicon Indicator Bit (DQ7) is permanently set to a 1 if the part is factory locked, and set to a 0 if customer lockable. This way, customer lockable parts can never be used to replace a factory locked part. Note that the S29AL032D has a Secured Silicon Sector size of 128 words (256 bytes). Factory locked parts provide several options. The Secured Silicon Sector may store a secure, random 16 byte ESN (Electronic Serial Number), customer code (programmed through the Spansion programming service), or both. The S29AL032D is entirely command set compatible with the JEDEC single-power-supply Flash standard. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine that controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from other Flash or EPROM devices. Device programming occurs by executing the program command sequence. This initiates the Embedded Program algorithm an internal algorithm that automatically times the program pulse widths and verifies proper cell margin. The Unlock Bypass mode facilitates faster programming times by requiring only two write cycles to program data instead of four. Device erasure occurs by executing the erase command sequence. This initiates the Embedded Erase algorithman internal algorithm that automatically preprograms the array (if it is not already programmed) before executing the erase operation. During erase, the device automatically times the erase pulse widths and verifies proper cell margin. The host system can detect whether a program or erase operation is complete by observing the RY/BY pin, or by reading the DQ7 (Data Polling) and DQ6 (toggle) status bits. After a program or erase cycle has been completed, the device is ready to read array data or accept another command. The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. The device is fully erased when shipped from the factory. Hardware data protection measures include a low V detector that automatically inhibits write operations during power CC transitions. The hardware sector protection feature disables both program and erase operations in any combination of the sectors of memory. This can be achieved in-system or via programming equipment. The Erase Suspend/Erase Resume feature enables the user to put erase on hold for any period of time to read data from, or program data to, any sector that is not selected for erasure. True background erase can thus be achieved. The hardware RESET pin terminates any operation in progress and resets the internal state machine to reading array data. The RESET pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the system microprocessor to read the boot-up firmware from the Flash memory. The device offers two power-saving features. When addresses are stable for a specified amount of time, the device enters the automatic sleep mode. The system can also place the device into the standby mode. Power consumption is greatly reduced in both these modes. The Spansion Flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effectiveness. The device electrically erases all bits within a sector simultaneously via Fowler-Nordheim tunneling. The data is programmed using hot-electron injection. Document Number: 002-02003 Rev. *B Page 2 of 64 Not Recommended for New Design

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)
CYP
Cypress
Cypress / Spansion
CYPRESS SEMI
Cypress Semicon
Cypress Semiconductor
Cypress Semiconductor Corp
INF
INFINEON
Infineon IR
INFINEON (CYPRESS)
Infineon (IRF)
Infineon / Cypress
Infineon / IR
INFINEON TECH ICs
Infineon Technologies
INFINEON TECHNOLOGIES AG
Infineon Technologies Americas Corp.
Infinite Power Solutions
INTERNATIONAL RECTIF
INTERNATIONAL RECTIFIER
International Rectifier HiRel Products
INTL RECTIFIER
IR
IRH
Ramtron
Ramtron / Cypress Semiconductor
Ramtron International Corp
SP9
SPANSION

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