APS6404L-SQRHX-SN

APS6404L-SQRH QSPI PSRAM SPI/QPI PSRAM Specifications Features Single Supply Voltage 50 Output Drive Strength LVCMOS. o VDD=1.62 to 1.98V Linear Burst is supported up to 84MHz and can Interface: SPI/QPI with SDR mode cross page boundary as long as tCEM is met. Performance: Clock rate up to 84MHz Software Reset Organization: 64Mb, 8M x 8bits Ultra Low Power Half Sleep Mode with data Addressable Bit Range: A 22:0 retention. Page Size: 1024 bytes Refresh: Self-managed Operating Temperature Range o TC = -40C to +85C (standard range) o TC = -40C to +105C (extended range) Maximum Standby Current o 300A 105C o 200A 85C o 100A 25C o 30A 25C (Half Sleep Mode with data retention) APM QSPI PSRAM Datasheet.pdf - Rev. 3.6 Nov 20, 2019 1 of 25 AP Memory reserves the right to change products and/or specifications without notice 2019 AP Memory. All rights reserved APS6404L-SQRH QSPI PSRAM Table of Contents 1 Table of Contents 1 Table of Contents ............................................................................................................. 2 2 Introduction ..................................................................................................................... 4 3 Package Information ........................................................................................................ 4 4 Package Outline Drawing ................................................................................................. 5 4.1 SOP-8L(150), package code SN ............................................................................... 5 4.2 USON-8L 3x2mm, package code ZR ........................................................................ 6 5 Ordering Information ....................................................................................................... 7 6 Signal Table ...................................................................................................................... 8 7 Power-Up Initialization .................................................................................................... 8 8 Interface Description ....................................................................................................... 9 8.1 Address Space ......................................................................................................... 9 8.2 Page Size ................................................................................................................. 9 8.3 Drive Strength ......................................................................................................... 9 8.4 Power-on Status ...................................................................................................... 9 8.5 Command/Address Latching Truth Table ............................................................. 10 8.6 Command Termination ......................................................................................... 11 9 Half Sleep mode Operation............................................................................................ 12 10 SPI Mode Operations ..................................................................................................... 13 10.1 SPI Read Operations.............................................................................................. 13 10.2 SPI Write Operations............................................................................................. 15 10.3 SPI Quad Mode Enable Operation ........................................................................ 16 10.4 SPI Read ID Operation ........................................................................................... 16 11 QPI Mode Operations .................................................................................................... 17 11.1 QPI Read Operation .............................................................................................. 17 11.2 QPI Write Operation(s) ......................................................................................... 18 11.3 QPI Quad Mode Exit operation ............................................................................. 18 12 Reset Operation ............................................................................................................. 19 13 Input/Output Timing ...................................................................................................... 20 APM QSPI PSRAM Datasheet.pdf - Rev. 3.6 Nov 20, 2019 2 of 25 AP Memory reserves the right to change products and/or specifications without notice 2019 AP Memory. All rights reserved