Avalanche Photodiode Bias Controller and Wide Range (5 nA to 5 mA) Current Monitor Data Sheet ADL5317 FEATURES FUNCTIONAL BLOCK DIAGRAM Accurately sets avalanche photodiode (APD) bias voltage 16 15 14 1313 COMM COMM COMM COMM ADL5317 Wide bias range from 6 V to 75 V 3 V-compatible control interface FALT 1 Monitors photodiode current (5:1 ratio) over six decades OVERCURRENT CURRENT PROTECTION MIRROR Linearity 0.25% from 10 nA to 1 mA, 0.5% from 5 nA to 5 mA 5:1 Overcurrent protection and overtemperature shutdown THERMAL PROTECTION Miniature 16-lead chip scale package (LFCSP 3 mm 3 mm) NC 12 VSET APPLICATIONS 2 30 V SET Optical power monitoring and biasing in APD systems IPDM 29 R 11 Wide dynamic range voltage sourcing and current I APD monitoring in high voltage systems 5 3 VPLV R NC 10 4 VPHV I APD GARD 9 VPHV VCLH GARD VAPD 5 6 7 8 Figure 1. GENERAL DESCRIPTION range of APD bias voltage. The current ratio of 5:1 remains The ADL5317 is a high voltage, wide dynamic range, biasing constant as VSET and VPHV are varied. and current monitoring device optimized for use with avalanche photodiodes. When used with a stable high voltage supply (up The ADL5317 also offers a supply tracking mode compatible to 80 V), the bias voltage at the VAPD pin can be varied from with adjustable high voltage supplies. The VAPD pin accurately 6 V to 75 V using the 3 V-compatible VSET pin. The current follows 2.0 V below the VPHV supply pin when VSET is tied to sourced from the VAPD pin over a range of 5 nA to 5 mA is a voltage from 3.0 V to 5.5 V (or higher with a current limiting accurately mirrored with an attenuation of 5 and sourced from resistor), and the VCLH pin is open. the IPDM monitor output. In a typical application, the monitor output drives a current input logarithmic amplifier to produce Protection from excessive input current at VAPD as well as an output representing the optical power incident upon the excessive die temperature is provided. The voltage at VAPD falls photodiode. The photodiode anode can be connected to a high rapidly from its setpoint when the input current exceeds 18 mA speed transimpedance amplifier for the extraction of the data nominally. A die temperature in excess of 140C will cause the stream. bias controller and monitor to shut down until the temperature falls below 120C. Either overstress condition will trigger a logic A signal of 0.2 V to 2.5 V with respect to ground applied at the low at the FALT pin, an open collector output loaded by an VSET pin is amplified by a fixed gain of 30 to produce the 6 V external pull-up to an appropriate logic supply (1 mA max). to 75 V bias at Pin VAPD. The accuracy of the bias control interface of the ADL5317 allows for straightforward calibration, thereby The ADL5317 is available in a 16-lead LFCSP package and is maintaining a constant avalanche multiplication factor of the specified for operation from 40C to +85C. photodiode over temperature. The current monitor output, IPDM, maintains its high linearity vs. photodiode current over the full Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20052017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 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Technical Support www.analog.com 05456-001ADL5317 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 VCLH Interface .......................................................................... 10 Applications ....................................................................................... 1 Noise Performance ..................................................................... 10 Functional Block Diagram .............................................................. 1 Response Time ............................................................................ 10 General Description ......................................................................... 1 Device Protection ....................................................................... 10 Table of Contents .............................................................................. 2 Applications Information .............................................................. 11 Specifications ..................................................................................... 3 Supply Tracking Mode ............................................................... 11 Absolute Maximum Ratings ............................................................ 4 Translinear Log Amp Interfacing ............................................. 11 ESD Caution .................................................................................. 4 Characterization Methods ........................................................ 12 Pin Configuration and Function Descriptions ............................. 5 Evaluation Board ............................................................................ 14 Typical Performance Characteristics ............................................. 6 Outline Dimensions ....................................................................... 16 Theory of Operation ........................................................................ 9 Ordering Guide .......................................................................... 16 Bias Control Interface .................................................................. 9 GARD Interface ............................................................................ 9 REVISION HISTORY 10/2017Rev. 0 to Rev. A Changed CP-16-3 to CP-16-21 .................................... Throughout Updated Outline Dimension ......................................................... 16 Changes to Ordering Guide .......................................................... 16 7/2005Revision 0: Initial Version Rev. A Page 2 of 16