CMOS 300 MSPS Quadrature Complete DDS Data Sheet AD9854 FEATURES Automatic bidirectional frequency sweeping Sin(x)/x correction 300 MHz internal clock rate Simplified control interfaces FSK, BPSK, PSK, chirp, AM operation 10 MHz serial 2- or 3-wire SPI compatible Dual integrated 12-bit digital-to-analog converters (DACs) 100 MHz parallel 8-bit programming Ultrahigh speed comparator, 3 ps rms jitter 3.3 V single supply Excellent dynamic performance Multiple power-down functions 80 dB SFDR at 100 MHz (1 MHz) A OUT Single-ended or differential input reference clock 4 to 20 programmable reference clock multiplier Small, 80-lead LQFP or TQFP with exposed pad Dual 48-bit programmable frequency registers Dual 14-bit programmable phase offset registers APPLICATIONS 12-bit programmable amplitude modulation and Agile, quadrature LO frequency synthesis on/off output shaped keying function Programmable clock generators Single-pin FSK and BPSK data interfaces FM chirp source for radar and scanning systems PSK capability via input/output interface Test and measurement equipment Linear or nonlinear FM chirp functions with single-pin Commercial and amateur RF exciters frequency hold function Frequency-ramped FSK <25 ps rms total jitter in clock generator mode FUNCTIONAL BLOCK DIAGRAM DIGITAL MULTIPLIERS SYSTEM CLOCK DDS CORE INV 12 SINC 4 TO 20 12 12-BIT REF FILTER ANALOG REFERENCE REF CLK I I CLK OUT CLOCK IN MULTIPLIER DAC BUFFER 48 48 17 16 SYSTEM DAC R SET CLOCK DIFF/SINGLE MUX INV SELECT 12-BIT SYSTEM 12 SINC 12 ANALOG Q DAC OR CLOCK 14 FILTER 48 OUT CONTROL Q DAC 3 FSK/BPSK/HOLD MUX MUX MUX 12 12 ANALOG DATA IN IN DELTA PROGRAMMABLE FREQUENCY SYSTEM AMPLITUDE AND RATE TIMER CLOCK RATE CONTROL 2 48 SYSTEM 48 48 14 12 12 COMPARATOR 14 CLOCK CLOCK DELTA FREQUENCY FREQUENCY FIRST 14-BIT SECOND 14-BIT I AND Q 12-BIT 12-BIT DC OUT FREQUENCY TUNING TUNING PHASE/OFFSET PHASE/OFFSET AM MODULATION CONTROL WORD WORD 1 WORD 2 WORD WORD MODE SELECT PROGRAMMING REGISTERS OSK SYSTEM SYSTEM CK CLOCK AD9854 BUS 2 Q CLOCK GND D BIDIRECTIONAL INT INTERNAL I/O PORT BUFFERS INTERNAL/EXTERNAL PROGRAMMABLE +V I/O UPDATE CLOCK S UPDATE CLOCK EXT READ WRITE SERIAL/ 6-BIT ADDRESS 8-BIT MASTER PARALLEL OR SERIAL PARALLEL RESET SELECT PROGRAMMING LOAD LINES Figure 1. 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DEMUX FREQUENCY ACCUMULATOR ACC 1 PHASE ACCUMULATOR ACC 2 PHASE-TO- AMPLITUDE CONVERTER MUX MUX MUX MUX 00636-001AD9854 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Inverse Sinc Function ................................................................ 31 Applications ....................................................................................... 1 REFCLK Multiplier .................................................................... 31 Functional Block Diagram .............................................................. 1 Programming the AD9854 ............................................................ 32 Revision History ............................................................................... 2 MASTER RESET ........................................................................ 32 General Description ......................................................................... 4 Parallel I/O Operation ............................................................... 34 Specif icat ions ..................................................................................... 5 Serial Port I/O Operation .......................................................... 34 Absolute Maximum Ratings ............................................................ 8 General Operation of the Serial Interface ................................... 36 Explanation of Test Levels ........................................................... 8 Instruction Byte .......................................................................... 37 ESD Caution .................................................................................. 8 Serial Interface Port Pin Descriptions ..................................... 37 Pin Configuration and Function Descriptions ............................. 9 Notes on Serial Port Operation ................................................ 37 Typical Performance Characteristics ........................................... 12 MSB/LSB Transfers......................................................................... 38 Typical Applications ....................................................................... 16 Control Register Description .................................................... 38 Theory of Operation ...................................................................... 19 Power Dissipation and Thermal Considerations ....................... 40 Modes of Operation ................................................................... 19 Thermal Impedance ................................................................... 40 Using the AD9854 .......................................................................... 29 Junction Temperature Considerations .................................... 40 Internal and External Update Clock ........................................ 29 Evaluation of Operating Conditions ........................................ 41 On/Off Output Shaped Keying (OSK) .................................... 29 Thermally Enhanced Package Mounting Guidelines ................ 41 I and Q DACs .............................................................................. 30 Outline Dimensions ....................................................................... 42 Control DAC ............................................................................... 30 Ordering Guide .......................................................................... 42 REVISION HISTORY 8/2019Rev. E to Rev. F Changes to Absolute Maximum Ratings Section .......................... 8 Changes to Figure 1 .......................................................................... 1 Changes to Power Dissipation Section ........................................ 40 Changes to General Description Section ...................................... 4 Changes to Thermally Enhanced Package Mounting Deleted Evaluation Board Section ................................................ 42 Guidelines Section .......................................................................... 41 Deleted Table 11 Renumbered Sequentially .............................. 42 Changes to Figure 64 ...................................................................... 47 Changes to Ordering Guide .......................................................... 42 Changes to Outline Dimensions .................................................. 52 Changes to Ordering Guide .......................................................... 52 Deleted Table 12 .............................................................................. 45 Deleted Figure 64 Renumbered Sequentially ............................ 47 Deleted Figure 65 ............................................................................ 48 11/2006Rev. C to Rev. D Deleted Figure 66 and 67 ............................................................... 49 Changes to General Description Section ....................................... 4 Deleted Figure 68 and 69 ............................................................... 50 Changes to Endnotes in the Power Supply Parameter ................. 7 Deleted Figure 70 ............................................................................ 51 Changes to Absolute Maximum Ratings Section .......................... 8 Added Endnotes to Table 2 .............................................................. 8 7/2007Rev. D to Rev. E Changes to Figure 50 ...................................................................... 29 Changes to Power Dissipation Section ........................................ 39 Changed AD9854ASQ to AD9854ASVZ ........................ Universal Changed AD9854AST to AD9854ASTZ ......................... Universal Changes to Figure 68 ...................................................................... 45 Changes to General Description .................................................... 4 Updated Outline Dimensions ....................................................... 51 Changes to Table 1 Endnotes .......................................................... 7 Changes to Ordering Guide .......................................................... 51 Rev. F Page 2 of 42