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AD8197AASTZ

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Equalizers 4:1 HDMI/DVI Switch w/ Equalization
Manufacturer: Analog Devices



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AD8197AASTZ
Analog Devices

1 : $ 24.6711
10 : $ 21.7737
25 : $ 20.8737
100 : $ 18.3789
250 : $ 17.4789
500 : $ 16.3421
1000 : $ 15.4263
2500 : $ 15.2053

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Manufacturer
Analog Devices
Product Category
Equalizers
RoHS - XON
Y Icon ROHS
Product
Cable Equalizers
Operating Supply Voltage
3.3 v to 5 V
Maximum Operating Temperature
+85 C
Minimum Operating Temperature
- 40 C
Package / Case
LQFP-100
Data Rate
250 Mbps To 2.25 Gbps
Input Voltage
3.3 v to 5 V
Output Voltage
3.3 v to 5 V
Packaging
Tray
Series
Ad8197a
Brand
Analog Devices
Mounting Style
Smd/Smt
Development Kit
Ad8197a-Evalz
Maximum Power Dissipation
1050 mW
Factory Pack Quantity :
90
Height
1.4 Mm
Length
14 Mm
Width
14 Mm
Cnhts
8542319000
Hts Code
8542390001
Mxhts
85423901
Pd - Power Dissipation
1050 mW
Product Type
Equalizers
Subcategory
Equalizers
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
Taric
8542399000
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4:1 HDMI/DVI Switch with Equalization AD8197A FEATURES FUNCTIONAL BLOCK DIAGRAM 4 inputs, 1 output HDMI/DVI link Enables HDMI 1.3-compliant receiver Pin-to-pin compatible with the AD8191A RESET 4 TMDS channels per link PARALLEL AD8197A SERIAL 2 2 Supports 250 Mbps to 2.25 Gbps data rates AVCC Supports 25 MHz to 225 MHz pixel clocks I2C_SDA DVCC CONFIG CONTROL I2C_SCL 3 Equalized inputs for operation with long HDMI cables INTERFACE LOGIC AMUXVCC I2C_ADDR[2:0] AVEE (20 meters at 2.25 Gbps) VTTI DVEE Fully buffered unidirectional inputs/outputs Globally switchable, 50 ? on-chip terminations + 4 VTTO IP_A[3:0] 4 IN_A[3:0] ? Pre-emphasized outputs 4 + IP_B[3:0] 4 4 + Low added jitter IN_B[3:0] OP[3:0] ? SWITCH 4 + 4 CORE ON[3:0] IP_C[3:0] Single-supply operation (3.3 V) ? PE 4 EQ IN_C[3:0] ? 4 auxiliary channels per link + 4 IP_D[3:0] 4 IN_D[3:0] ? Bidirectional unbuffered inputs/outputs HIGH SPEED BUFFERED Flexible supply operation (3.3 V to 5 V) HDCP standard compatible VTTI 4 AUX_A[3:0] 4 Allows switching of DDC bus and 2 additional signals AUX_B[3:0] 4 SWITCH 4 AUX_COM[3:0] CORE AUX_C[3:0] Output disable feature 4 AUX_D[3:0] Reduced power dissipation LOW SPEED UNBUFFERED Removable output termination BIDIRECTIONAL Allows building of larger arrays Figure 1. 2 AD8197A devices support HDMI/DVI dual-link TYPICAL APPLICATION Standards compatible: HDMI receiver, HDCP, DVI GAME CONSOLE 2 MEDIA CENTER Serial (I C slave) and parallel control interface HDTV SET 100-lead, 14 mm ? 14 mm LQFP, Pb-free package HDMI RECEIVER APPLICATIONS SET-TOP BOX DVD PLAYER AD8197A 04:20 Multiple input displays Projectors Figure 2. Typical HDTV Application A/V receivers Set-top boxes Advanced television (HDTV) sets GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD8197A is an HDMI?/DVI switch featuring equalized 1. Supports data rates up to 2.25 Gbps, enabling 1080p deep TMDS? inputs and pre-emphasized TMDS outputs, ideal for color (12-bit color) HDMI formats, and greater than systems with long cable runs. Outputs can be set to a high UXGA (1600 ? 1200) DVI resolutions. impedance state to reduce the power dissipation and/or to allow 2. Input cable equalizer enables use of long cables at the input the construction of larger arrays using the wire-OR technique. (more than 20 meters of 24 AWG cable at 2.25 Gbps). 3. Auxiliary switch routes a DDC bus and two additional signals The AD8197A is provided in a 100-lead LQFP, Pb-free, surface- for a single-chip, HDMI 1.3 receive-compliant solution. mount package, specified to operate over the ?40?C to +85?C temperature range. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ?2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PP_CH[1:0] PP_OTO PP_OCL PP_EQ PP_EN PP_PRE[1:0] 07014-001 07014-002 4:1 HDMI/DVI Switch with Equalization AD8197A FEATURES FUNCTIONAL BLOCK DIAGRAM 4 inputs, 1 output HDMI/DVI link Enables HDMI 1.3-compliant receiver Pin-to-pin compatible with the AD8191A RESET 4 TMDS channels per link PARALLEL AD8197A SERIAL 2 2 Supports 250 Mbps to 2.25 Gbps data rates AVCC Supports 25 MHz to 225 MHz pixel clocks I2C_SDA DVCC CONFIG CONTROL I2C_SCL 3 Equalized inputs for operation with long HDMI cables INTERFACE LOGIC AMUXVCC I2C_ADDR[2:0] AVEE (20 meters at 2.25 Gbps) VTTI DVEE Fully buffered unidirectional inputs/outputs Globally switchable, 50 O on-chip terminations + 4 VTTO IP_A[3:0] 4 IN_A[3:0] ? Pre-emphasized outputs 4 + IP_B[3:0] 4 4 + Low added jitter IN_B[3:0] OP[3:0] ? SWITCH 4 + 4 CORE ON[3:0] IP_C[3:0] Single-supply operation (3.3 V) ? PE 4 EQ IN_C[3:0] ? 4 auxiliary channels per link + 4 IP_D[3:0] 4 IN_D[3:0] ? Bidirectional unbuffered inputs/outputs HIGH SPEED BUFFERED Flexible supply operation (3.3 V to 5 V) HDCP standard compatible VTTI 4 AUX_A[3:0] 4 Allows switching of DDC bus and 2 additional signals AUX_B[3:0] 4 SWITCH 4 AUX_COM[3:0] CORE AUX_C[3:0] Output disable feature 4 AUX_D[3:0] Reduced power dissipation LOW SPEED UNBUFFERED Removable output termination BIDIRECTIONAL Allows building of larger arrays Figure 1. 2 AD8197A devices support HDMI/DVI dual-link TYPICAL APPLICATION Standards compatible: HDMI receiver, HDCP, DVI GAME CONSOLE 2 MEDIA CENTER Serial (I C slave) and parallel control interface HDTV SET 100-lead, 14 mm ? 14 mm LQFP, Pb-free package HDMI RECEIVER APPLICATIONS SET-TOP BOX DVD PLAYER AD8197A 04:20 Multiple input displays Projectors Figure 2. Typical HDTV Application A/V receivers Set-top boxes Advanced television (HDTV) sets GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD8197A is an HDMI?/DVI switch featuring equalized 1. Supports data rates up to 2.25 Gbps, enabling 1080p deep TMDS? inputs and pre-emphasized TMDS outputs, ideal for color (12-bit color) HDMI formats, and greater than systems with long cable runs. Outputs can be set to a high UXGA (1600 ? 1200) DVI resolutions. impedance state to reduce the power dissipation and/or to allow 2. Input cable equalizer enables use of long cables at the input the construction of larger arrays using the wire-OR technique. (more than 20 meters of 24 AWG cable at 2.25 Gbps). 3. Auxiliary switch routes a DDC bus and two additional signals The AD8197A is provided in a 100-lead LQFP, Pb-free, surface- for a single-chip, HDMI 1.3 receive-compliant solution. mount package, specified to operate over the -40?C to +85?C temperature range. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ?2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PP_CH[1:0] PP_OTO PP_OCL PP_EQ PP_EN PP_PRE[1:0] 07014-001 07014-002AD8197A* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS DESIGN RESOURCES View a parametric search of comparable parts. ? AD8197A Material Declaration ? PCN-PDN Information EVALUATION KITS ? Quality And Reliability ? AD8197A Evaluation Board ? Symbols and Footprints DOCUMENTATION DISCUSSIONS Data Sheet View all AD8197A EngineerZone Discussions. ? AD8197A: 4:1 HDMI/DVI Switch with Equalization Data Sheet SAMPLE AND BUY Visit the product page to see pricing options. REFERENCE MATERIALS Informational TECHNICAL SUPPORT ? Advantiv? Advanced TV Solutions Submit a technical question or find your regional support Technical Articles number. ? Analysis of Common Failures of HDMI CT DOCUMENT FEEDBACK Submit feedback for this data sheet. This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified. 4:1 HDMI/DVI Switch with Equalization AD8197A FEATURES FUNCTIONAL BLOCK DIAGRAM 4 inputs, 1 output HDMI/DVI link Enables HDMI 1.3-compliant receiver Pin-to-pin compatible with the AD8191A RESET 4 TMDS channels per link PARALLEL AD8197A SERIAL 2 2 Supports 250 Mbps to 2.25 Gbps data rates AVCC Supports 25 MHz to 225 MHz pixel clocks I2C_SDA DVCC CONFIG CONTROL I2C_SCL 3 Equalized inputs for operation with long HDMI cables INTERFACE LOGIC AMUXVCC I2C_ADDR[2:0] AVEE (20 meters at 2.25 Gbps) VTTI DVEE Fully buffered unidirectional inputs/outputs Globally switchable, 50 O on-chip terminations + 4 VTTO IP_A[3:0] 4 IN_A[3:0] ? Pre-emphasized outputs 4 + IP_B[3:0] 4 4 + Low added jitter IN_B[3:0] OP[3:0] ? SWITCH 4 + 4 CORE ON[3:0] IP_C[3:0] Single-supply operation (3.3 V) ? PE 4 EQ IN_C[3:0] ? 4 auxiliary channels per link + 4 IP_D[3:0] 4 IN_D[3:0] ? Bidirectional unbuffered inputs/outputs HIGH SPEED BUFFERED Flexible supply operation (3.3 V to 5 V) HDCP standard compatible VTTI 4 AUX_A[3:0] 4 Allows switching of DDC bus and 2 additional signals AUX_B[3:0] 4 SWITCH 4 AUX_COM[3:0] CORE AUX_C[3:0] Output disable feature 4 AUX_D[3:0] Reduced power dissipation LOW SPEED UNBUFFERED Removable output termination BIDIRECTIONAL Allows building of larger arrays Figure 1. 2 AD8197A devices support HDMI/DVI dual-link TYPICAL APPLICATION Standards compatible: HDMI receiver, HDCP, DVI GAME CONSOLE 2 MEDIA CENTER Serial (I C slave) and parallel control interface HDTV SET 100-lead, 14 mm ? 14 mm LQFP, Pb-free package HDMI RECEIVER APPLICATIONS SET-TOP BOX DVD PLAYER AD8197A 04:20 Multiple input displays Projectors Figure 2. Typical HDTV Application A/V receivers Set-top boxes Advanced television (HDTV) sets GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD8197A is an HDMI?/DVI switch featuring equalized 1. Supports data rates up to 2.25 Gbps, enabling 1080p deep TMDS? inputs and pre-emphasized TMDS outputs, ideal for color (12-bit color) HDMI formats, and greater than systems with long cable runs. Outputs can be set to a high UXGA (1600 ? 1200) DVI resolutions. impedance state to reduce the power dissipation and/or to allow 2. Input cable equalizer enables use of long cables at the input the construction of larger arrays using the wire-OR technique. (more than 20 meters of 24 AWG cable at 2.25 Gbps). 3. Auxiliary switch routes a DDC bus and two additional signals The AD8197A is provided in a 100-lead LQFP, Pb-free, surface- for a single-chip, HDMI 1.3 receive-compliant solution. mount package, specified to operate over the -40?C to +85?C temperature range. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ?2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PP_CH[1:0] PP_OTO PP_OCL PP_EQ PP_EN PP_PRE[1:0] 07014-001 07014-002 4:1 HDMI/DVI Switch with Equalization AD8197A FEATURES FUNCTIONAL BLOCK DIAGRAM 4 inputs, 1 output HDMI/DVI link Enables HDMI 1.3-compliant receiver Pin-to-pin compatible with the AD8191A RESET 4 TMDS channels per link PARALLEL AD8197A SERIAL 2 2 Supports 250 Mbps to 2.25 Gbps data rates AVCC Supports 25 MHz to 225 MHz pixel clocks I2C_SDA DVCC CONFIG CONTROL I2C_SCL 3 Equalized inputs for operation with long HDMI cables INTERFACE LOGIC AMUXVCC I2C_ADDR[2:0] AVEE (20 meters at 2.25 Gbps) VTTI DVEE Fully buffered unidirectional inputs/outputs Globally switchable, 50 O on-chip terminations + 4 VTTO IP_A[3:0] 4 IN_A[3:0] ? Pre-emphasized outputs 4 + IP_B[3:0] 4 4 + Low added jitter IN_B[3:0] OP[3:0] ? SWITCH 4 + 4 CORE ON[3:0] IP_C[3:0] Single-supply operation (3.3 V) ? PE 4 EQ IN_C[3:0] ? 4 auxiliary channels per link + 4 IP_D[3:0] 4 IN_D[3:0] ? Bidirectional unbuffered inputs/outputs HIGH SPEED BUFFERED Flexible supply operation (3.3 V to 5 V) HDCP standard compatible VTTI 4 AUX_A[3:0] 4 Allows switching of DDC bus and 2 additional signals AUX_B[3:0] 4 SWITCH 4 AUX_COM[3:0] CORE AUX_C[3:0] Output disable feature 4 AUX_D[3:0] Reduced power dissipation LOW SPEED UNBUFFERED Removable output termination BIDIRECTIONAL Allows building of larger arrays Figure 1. 2 AD8197A devices support HDMI/DVI dual-link TYPICAL APPLICATION Standards compatible: HDMI receiver, HDCP, DVI GAME CONSOLE 2 MEDIA CENTER Serial (I C slave) and parallel control interface HDTV SET 100-lead, 14 mm ? 14 mm LQFP, Pb-free package HDMI RECEIVER APPLICATIONS SET-TOP BOX DVD PLAYER AD8197A 04:20 Multiple input displays Projectors Figure 2. Typical HDTV Application A/V receivers Set-top boxes Advanced television (HDTV) sets GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD8197A is an HDMI?/DVI switch featuring equalized 1. Supports data rates up to 2.25 Gbps, enabling 1080p deep TMDS? inputs and pre-emphasized TMDS outputs, ideal for color (12-bit color) HDMI formats, and greater than systems with long cable runs. Outputs can be set to a high UXGA (1600 ? 1200) DVI resolutions. impedance state to reduce the power dissipation and/or to allow 2. Input cable equalizer enables use of long cables at the input the construction of larger arrays using the wire-OR technique. (more than 20 meters of 24 AWG cable at 2.25 Gbps). 3. Auxiliary switch routes a DDC bus and two additional signals The AD8197A is provided in a 100-lead LQFP, Pb-free, surface- for a single-chip, HDMI 1.3 receive-compliant solution. mount package, specified to operate over the -40?C to +85?C temperature range. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ?2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PP_CH[1:0] PP_OTO PP_OCL PP_EQ PP_EN PP_PRE[1:0] 07014-001 07014-002AD8197A* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS DESIGN RESOURCES View a parametric search of comparable parts. ? AD8197A Material Declaration ? PCN-PDN Information EVALUATION KITS ? Quality And Reliability ? AD8197A Evaluation Board ? Symbols and Footprints DOCUMENTATION DISCUSSIONS Data Sheet View all AD8197A EngineerZone Discussions. ? AD8197A: 4:1 HDMI/DVI Switch with Equalization Data Sheet SAMPLE AND BUY Visit the product page to see pricing options. REFERENCE MATERIALS Informational TECHNICAL SUPPORT ? Advantiv? Advanced TV Solutions Submit a technical question or find your regional support Technical Articles number. ? Analysis of Common Failures of HDMI CT DOCUMENT FEEDBACK Submit feedback for this data sheet. This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.AD8197A TABLE OF CONTENTS Features .............................................................................................. 1 Read Procedure........................................................................... 16 Applications....................................................................................... 1 Switching/Update Delay............................................................ 16 Functional Block Diagram .............................................................. 1 Parallel Control Interface .............................................................. 17 Typical Application........................................................................... 1 Serial Interface Configuration Registers ..................................... 18 General Description ......................................................................... 1 High Speed Device Modes Register......................................... 19 Product Highlights ........................................................................... 1 Auxiliary Device Modes Register............................................. 19 Revision History ............................................................................... 2 Receiver Settings Register ......................................................... 19 Specifications..................................................................................... 3 Input Termination Pulse Register 1 and Register 2 ............... 19 Absolute Maximum Ratings............................................................ 5 Receive Equalizer Register 1 and Register 2 ........................... 20 Thermal Resistance ...................................................................... 5 Transmitter Settings Register.................................................... 20 Maximum Power Dissipation ..................................................... 5 Parallel Interface Configuration Registers .................................. 21 ESD Caution.................................................................................. 5 High Speed Device Modes Register......................................... 22 Pin Configuration and Function Descriptions............................. 6 Auxiliary Device Modes Register............................................. 22 Typical Performance Characteristics ............................................. 9 Receiver Settings Register ......................................................... 22 Eye Diagrams ................................................................................ 9 Input Termination Pulse Register 1 and Register 2 ............... 22 Performance Graphs .................................................................. 11 Receive Equalizer Register 1 and Register 2 ........................... 22 Theory of Operation ...................................................................... 13 Transmitter Settings Register.................................................... 22 Introduction ................................................................................ 13 Application Information................................................................ 23 Input Channels............................................................................ 13 Pinout........................................................................................... 23 Output Channels ........................................................................ 13 Cable Lengths and Equalization............................................... 23 Auxiliary Switch.......................................................................... 14 PCB Layout Guidelines.............................................................. 24 Serial Control Interface.................................................................. 15 Outline Dimensions....................................................................... 28 Reset ............................................................................................. 15 Ordering Guide .......................................................................... 28 Write Procedure.......................................................................... 15 REVISION HISTORY 11/07?Revision 0: Initial Version Rev. 0 | Page 2 of 28 4:1 HDMI/DVI Switch with Equalization AD8197A FEATURES FUNCTIONAL BLOCK DIAGRAM 4 inputs, 1 output HDMI/DVI link Enables HDMI 1.3-compliant receiver Pin-to-pin compatible with the AD8191A RESET 4 TMDS channels per link PARALLEL AD8197A SERIAL 2 2 Supports 250 Mbps to 2.25 Gbps data rates AVCC Supports 25 MHz to 225 MHz pixel clocks I2C_SDA DVCC CONFIG CONTROL I2C_SCL 3 Equalized inputs for operation with long HDMI cables INTERFACE LOGIC AMUXVCC I2C_ADDR[2:0] AVEE (20 meters at 2.25 Gbps) VTTI DVEE Fully buffered unidirectional inputs/outputs Globally switchable, 50 O on-chip terminations + 4 VTTO IP_A[3:0] 4 IN_A[3:0] ? Pre-emphasized outputs 4 + IP_B[3:0] 4 4 + Low added jitter IN_B[3:0] OP[3:0] ? SWITCH 4 + 4 CORE ON[3:0] IP_C[3:0] Single-supply operation (3.3 V) ? PE 4 EQ IN_C[3:0] ? 4 auxiliary channels per link + 4 IP_D[3:0] 4 IN_D[3:0] ? Bidirectional unbuffered inputs/outputs HIGH SPEED BUFFERED Flexible supply operation (3.3 V to 5 V) HDCP standard compatible VTTI 4 AUX_A[3:0] 4 Allows switching of DDC bus and 2 additional signals AUX_B[3:0] 4 SWITCH 4 AUX_COM[3:0] CORE AUX_C[3:0] Output disable feature 4 AUX_D[3:0] Reduced power dissipation LOW SPEED UNBUFFERED Removable output termination BIDIRECTIONAL Allows building of larger arrays Figure 1. 2 AD8197A devices support HDMI/DVI dual-link TYPICAL APPLICATION Standards compatible: HDMI receiver, HDCP, DVI GAME CONSOLE 2 MEDIA CENTER Serial (I C slave) and parallel control interface HDTV SET 100-lead, 14 mm ? 14 mm LQFP, Pb-free package HDMI RECEIVER APPLICATIONS SET-TOP BOX DVD PLAYER AD8197A 04:20 Multiple input displays Projectors Figure 2. Typical HDTV Application A/V receivers Set-top boxes Advanced television (HDTV) sets GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD8197A is an HDMI?/DVI switch featuring equalized 1. Supports data rates up to 2.25 Gbps, enabling 1080p deep TMDS? inputs and pre-emphasized TMDS outputs, ideal for color (12-bit color) HDMI formats, and greater than systems with long cable runs. Outputs can be set to a high UXGA (1600 ? 1200) DVI resolutions. impedance state to reduce the power dissipation and/or to allow 2. Input cable equalizer enables use of long cables at the input the construction of larger arrays using the wire-OR technique. (more than 20 meters of 24 AWG cable at 2.25 Gbps). 3. Auxiliary switch routes a DDC bus and two additional signals The AD8197A is provided in a 100-lead LQFP, Pb-free, surface- for a single-chip, HDMI 1.3 receive-compliant solution. mount package, specified to operate over the -40?C to +85?C temperature range. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ?2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PP_CH[1:0] PP_OTO PP_OCL PP_EQ PP_EN PP_PRE[1:0] 07014-001 07014-002 4:1 HDMI/DVI Switch with Equalization AD8197A FEATURES FUNCTIONAL BLOCK DIAGRAM 4 inputs, 1 output HDMI/DVI link Enables HDMI 1.3-compliant receiver Pin-to-pin compatible with the AD8191A RESET 4 TMDS channels per link PARALLEL AD8197A SERIAL 2 2 Supports 250 Mbps to 2.25 Gbps data rates AVCC Supports 25 MHz to 225 MHz pixel clocks I2C_SDA DVCC CONFIG CONTROL I2C_SCL 3 Equalized inputs for operation with long HDMI cables INTERFACE LOGIC AMUXVCC I2C_ADDR[2:0] AVEE (20 meters at 2.25 Gbps) VTTI DVEE Fully buffered unidirectional inputs/outputs Globally switchable, 50 O on-chip terminations + 4 VTTO IP_A[3:0] 4 IN_A[3:0] ? Pre-emphasized outputs 4 + IP_B[3:0] 4 4 + Low added jitter IN_B[3:0] OP[3:0] ? SWITCH 4 + 4 CORE ON[3:0] IP_C[3:0] Single-supply operation (3.3 V) ? PE 4 EQ IN_C[3:0] ? 4 auxiliary channels per link + 4 IP_D[3:0] 4 IN_D[3:0] ? Bidirectional unbuffered inputs/outputs HIGH SPEED BUFFERED Flexible supply operation (3.3 V to 5 V) HDCP standard compatible VTTI 4 AUX_A[3:0] 4 Allows switching of DDC bus and 2 additional signals AUX_B[3:0] 4 SWITCH 4 AUX_COM[3:0] CORE AUX_C[3:0] Output disable feature 4 AUX_D[3:0] Reduced power dissipation LOW SPEED UNBUFFERED Removable output termination BIDIRECTIONAL Allows building of larger arrays Figure 1. 2 AD8197A devices support HDMI/DVI dual-link TYPICAL APPLICATION Standards compatible: HDMI receiver, HDCP, DVI GAME CONSOLE 2 MEDIA CENTER Serial (I C slave) and parallel control interface HDTV SET 100-lead, 14 mm ? 14 mm LQFP, Pb-free package HDMI RECEIVER APPLICATIONS SET-TOP BOX DVD PLAYER AD8197A 04:20 Multiple input displays Projectors Figure 2. Typical HDTV Application A/V receivers Set-top boxes Advanced television (HDTV) sets GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD8197A is an HDMI?/DVI switch featuring equalized 1. Supports data rates up to 2.25 Gbps, enabling 1080p deep TMDS? inputs and pre-emphasized TMDS outputs, ideal for color (12-bit color) HDMI formats, and greater than systems with long cable runs. Outputs can be set to a high UXGA (1600 ? 1200) DVI resolutions. impedance state to reduce the power dissipation and/or to allow 2. Input cable equalizer enables use of long cables at the input the construction of larger arrays using the wire-OR technique. (more than 20 meters of 24 AWG cable at 2.25 Gbps). 3. Auxiliary switch routes a DDC bus and two additional signals The AD8197A is provided in a 100-lead LQFP, Pb-free, surface- for a single-chip, HDMI 1.3 receive-compliant solution. mount package, specified to operate over the -40?C to +85?C temperature range. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ?2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PP_CH[1:0] PP_OTO PP_OCL PP_EQ PP_EN PP_PRE[1:0] 07014-001 07014-002AD8197A* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS DESIGN RESOURCES View a parametric search of comparable parts. ? AD8197A Material Declaration ? PCN-PDN Information EVALUATION KITS ? Quality And Reliability ? AD8197A Evaluation Board ? Symbols and Footprints DOCUMENTATION DISCUSSIONS Data Sheet View all AD8197A EngineerZone Discussions. ? AD8197A: 4:1 HDMI/DVI Switch with Equalization Data Sheet SAMPLE AND BUY Visit the product page to see pricing options. REFERENCE MATERIALS Informational TECHNICAL SUPPORT ? Advantiv? Advanced TV Solutions Submit a technical question or find your regional support Technical Articles number. ? Analysis of Common Failures of HDMI CT DOCUMENT FEEDBACK Submit feedback for this data sheet. This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified. 4:1 HDMI/DVI Switch with Equalization AD8197A FEATURES FUNCTIONAL BLOCK DIAGRAM 4 inputs, 1 output HDMI/DVI link Enables HDMI 1.3-compliant receiver Pin-to-pin compatible with the AD8191A RESET 4 TMDS channels per link PARALLEL AD8197A SERIAL 2 2 Supports 250 Mbps to 2.25 Gbps data rates AVCC Supports 25 MHz to 225 MHz pixel clocks I2C_SDA DVCC CONFIG CONTROL I2C_SCL 3 Equalized inputs for operation with long HDMI cables INTERFACE LOGIC AMUXVCC I2C_ADDR[2:0] AVEE (20 meters at 2.25 Gbps) VTTI DVEE Fully buffered unidirectional inputs/outputs Globally switchable, 50 O on-chip terminations + 4 VTTO IP_A[3:0] 4 IN_A[3:0] ? Pre-emphasized outputs 4 + IP_B[3:0] 4 4 + Low added jitter IN_B[3:0] OP[3:0] ? SWITCH 4 + 4 CORE ON[3:0] IP_C[3:0] Single-supply operation (3.3 V) ? PE 4 EQ IN_C[3:0] ? 4 auxiliary channels per link + 4 IP_D[3:0] 4 IN_D[3:0] ? Bidirectional unbuffered inputs/outputs HIGH SPEED BUFFERED Flexible supply operation (3.3 V to 5 V) HDCP standard compatible VTTI 4 AUX_A[3:0] 4 Allows switching of DDC bus and 2 additional signals AUX_B[3:0] 4 SWITCH 4 AUX_COM[3:0] CORE AUX_C[3:0] Output disable feature 4 AUX_D[3:0] Reduced power dissipation LOW SPEED UNBUFFERED Removable output termination BIDIRECTIONAL Allows building of larger arrays Figure 1. 2 AD8197A devices support HDMI/DVI dual-link TYPICAL APPLICATION Standards compatible: HDMI receiver, HDCP, DVI GAME CONSOLE 2 MEDIA CENTER Serial (I C slave) and parallel control interface HDTV SET 100-lead, 14 mm ? 14 mm LQFP, Pb-free package HDMI RECEIVER APPLICATIONS SET-TOP BOX DVD PLAYER AD8197A 04:20 Multiple input displays Projectors Figure 2. Typical HDTV Application A/V receivers Set-top boxes Advanced television (HDTV) sets GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD8197A is an HDMI?/DVI switch featuring equalized 1. Supports data rates up to 2.25 Gbps, enabling 1080p deep TMDS? inputs and pre-emphasized TMDS outputs, ideal for color (12-bit color) HDMI formats, and greater than systems with long cable runs. Outputs can be set to a high UXGA (1600 ? 1200) DVI resolutions. impedance state to reduce the power dissipation and/or to allow 2. Input cable equalizer enables use of long cables at the input the construction of larger arrays using the wire-OR technique. (more than 20 meters of 24 AWG cable at 2.25 Gbps). 3. Auxiliary switch routes a DDC bus and two additional signals The AD8197A is provided in a 100-lead LQFP, Pb-free, surface- for a single-chip, HDMI 1.3 receive-compliant solution. mount package, specified to operate over the -40?C to +85?C temperature range. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ?2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PP_CH[1:0] PP_OTO PP_OCL PP_EQ PP_EN PP_PRE[1:0] 07014-001 07014-002 4:1 HDMI/DVI Switch with Equalization AD8197A FEATURES FUNCTIONAL BLOCK DIAGRAM 4 inputs, 1 output HDMI/DVI link Enables HDMI 1.3-compliant receiver Pin-to-pin compatible with the AD8191A RESET 4 TMDS channels per link PARALLEL AD8197A SERIAL 2 2 Supports 250 Mbps to 2.25 Gbps data rates AVCC Supports 25 MHz to 225 MHz pixel clocks I2C_SDA DVCC CONFIG CONTROL I2C_SCL 3 Equalized inputs for operation with long HDMI cables INTERFACE LOGIC AMUXVCC I2C_ADDR[2:0] AVEE (20 meters at 2.25 Gbps) VTTI DVEE Fully buffered unidirectional inputs/outputs Globally switchable, 50 O on-chip terminations + 4 VTTO IP_A[3:0] 4 IN_A[3:0] ? Pre-emphasized outputs 4 + IP_B[3:0] 4 4 + Low added jitter IN_B[3:0] OP[3:0] ? SWITCH 4 + 4 CORE ON[3:0] IP_C[3:0] Single-supply operation (3.3 V) ? PE 4 EQ IN_C[3:0] ? 4 auxiliary channels per link + 4 IP_D[3:0] 4 IN_D[3:0] ? Bidirectional unbuffered inputs/outputs HIGH SPEED BUFFERED Flexible supply operation (3.3 V to 5 V) HDCP standard compatible VTTI 4 AUX_A[3:0] 4 Allows switching of DDC bus and 2 additional signals AUX_B[3:0] 4 SWITCH 4 AUX_COM[3:0] CORE AUX_C[3:0] Output disable feature 4 AUX_D[3:0] Reduced power dissipation LOW SPEED UNBUFFERED Removable output termination BIDIRECTIONAL Allows building of larger arrays Figure 1. 2 AD8197A devices support HDMI/DVI dual-link TYPICAL APPLICATION Standards compatible: HDMI receiver, HDCP, DVI GAME CONSOLE 2 MEDIA CENTER Serial (I C slave) and parallel control interface HDTV SET 100-lead, 14 mm ? 14 mm LQFP, Pb-free package HDMI RECEIVER APPLICATIONS SET-TOP BOX DVD PLAYER AD8197A 04:20 Multiple input displays Projectors Figure 2. Typical HDTV Application A/V receivers Set-top boxes Advanced television (HDTV) sets GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD8197A is an HDMI?/DVI switch featuring equalized 1. Supports data rates up to 2.25 Gbps, enabling 1080p deep TMDS? inputs and pre-emphasized TMDS outputs, ideal for color (12-bit color) HDMI formats, and greater than systems with long cable runs. Outputs can be set to a high UXGA (1600 ? 1200) DVI resolutions. impedance state to reduce the power dissipation and/or to allow 2. Input cable equalizer enables use of long cables at the input the construction of larger arrays using the wire-OR technique. (more than 20 meters of 24 AWG cable at 2.25 Gbps). 3. Auxiliary switch routes a DDC bus and two additional signals The AD8197A is provided in a 100-lead LQFP, Pb-free, surface- for a single-chip, HDMI 1.3 receive-compliant solution. mount package, specified to operate over the -40?C to +85?C temperature range. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ?2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PP_CH[1:0] PP_OTO PP_OCL PP_EQ PP_EN PP_PRE[1:0] 07014-001 07014-002AD8197A* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS DESIGN RESOURCES View a parametric search of comparable parts. ? AD8197A Material Declaration ? PCN-PDN Information EVALUATION KITS ? Quality And Reliability ? AD8197A Evaluation Board ? Symbols and Footprints DOCUMENTATION DISCUSSIONS Data Sheet View all AD8197A EngineerZone Discussions. ? AD8197A: 4:1 HDMI/DVI Switch with Equalization Data Sheet SAMPLE AND BUY Visit the product page to see pricing options. REFERENCE MATERIALS Informational TECHNICAL SUPPORT ? Advantiv? Advanced TV Solutions Submit a technical question or find your regional support Technical Articles number. ? Analysis of Common Failures of HDMI CT DOCUMENT FEEDBACK Submit feedback for this data sheet. This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.AD8197A TABLE OF CONTENTS Features .............................................................................................. 1 Read Procedure........................................................................... 16 Applications....................................................................................... 1 Switching/Update Delay............................................................ 16 Functional Block Diagram .............................................................. 1 Parallel Control Interface .............................................................. 17 Typical Application........................................................................... 1 Serial Interface Configuration Registers ..................................... 18 General Description ......................................................................... 1 High Speed Device Modes Register......................................... 19 Product Highlights ........................................................................... 1 Auxiliary Device Modes Register............................................. 19 Revision History ............................................................................... 2 Receiver Settings Register ......................................................... 19 Specifications..................................................................................... 3 Input Termination Pulse Register 1 and Register 2 ............... 19 Absolute Maximum Ratings............................................................ 5 Receive Equalizer Register 1 and Register 2 ........................... 20 Thermal Resistance ...................................................................... 5 Transmitter Settings Register.................................................... 20 Maximum Power Dissipation ..................................................... 5 Parallel Interface Configuration Registers .................................. 21 ESD Caution.................................................................................. 5 High Speed Device Modes Register......................................... 22 Pin Configuration and Function Descriptions............................. 6 Auxiliary Device Modes Register............................................. 22 Typical Performance Characteristics ............................................. 9 Receiver Settings Register ......................................................... 22 Eye Diagrams ................................................................................ 9 Input Termination Pulse Register 1 and Register 2 ............... 22 Performance Graphs .................................................................. 11 Receive Equalizer Register 1 and Register 2 ........................... 22 Theory of Operation ...................................................................... 13 Transmitter Settings Register.................................................... 22 Introduction ................................................................................ 13 Application Information................................................................ 23 Input Channels............................................................................ 13 Pinout........................................................................................... 23 Output Channels ........................................................................ 13 Cable Lengths and Equalization............................................... 23 Auxiliary Switch.......................................................................... 14 PCB Layout Guidelines.............................................................. 24 Serial Control Interface.................................................................. 15 Outline Dimensions....................................................................... 28 Reset ............................................................................................. 15 Ordering Guide .......................................................................... 28 Write Procedure.......................................................................... 15 REVISION HISTORY 11/07?Revision 0: Initial Version Rev. 0 | Page 2 of 28

Tariff Concession Code
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Free
8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
AD4
ANALOG DEVICES
Analog Devices Hittite
ANALOG DEVICES (LINEAR TECHNOLOGY)
Analog Devices / Hittite
Analog Devices / Linear Technology
Analog Devices Inc
Analog Devices Inc.
Analog Devices, Inc.
ANALOG MICRO ELECTRONICS
ANALOG MICROELECTRONICS
LINEAR
LINEAR TECH
Linear Technology
Linear Technology (part of ADI)
LT
LT4
Technology