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AD53508JP

AD53508JP electronic component of Analog Devices

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Power Management Specialised - PMIC Dual PMU

Manufacturer: Analog Devices
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1: USD 49.9653 ea
Line Total: USD 49.97

0 - Global Stock
MOQ: 1  Multiples: 1
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AD53508JP
Analog Devices

1 : USD 49.9653
5 : USD 49.9653
10 : USD 49.9653
25 : USD 49.9653
50 : USD 49.9653
100 : USD 49.3185
250 : USD 46.0268
500 : USD 45.2298

     
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a PPMU Circuit AD53508 FEATURES The device provides a remote force/sense capability to ensure Dual Measurement Channels accuracy at the tester pin. A guard output is available to drive Precision Four-Quadrant-Per-Pin V/I Source the shield of a force/sense pair. Programmable Current Force Ranges Two input references per channel permit controlled switching to 204.8 A and 2.048 mA different voltage or current levels. The forced voltage or current Five Current Measurement Ranges levels can be switched back to the measurement system to read 204.8 nA to 2.048 mA back the analog levels for system calibration. Output Voltage Range: 4 V to +9 V The circuit is powered by +15 V, +5 V, and 10 V supplies and Power Supplies: +15 V, +5 V, and 10 V dissipates 230 mW nominally. 44-Lead Plastic J-Leaded Chip Carrier Package Recommended Use of the PPMU with AD53032 DCL APPLICATIONS The PPMU can be used with the AD53032 DCL to extend the Can Be Used with the AD53032 DCL to Extend Current Current Force Range beyond 2 mA VCOM can be set to the Force Range to 35 mA maximum spec allowance of 8 V, which would allow the maxi- mum Current Force of IOL of 35 mA. The combination of the GENERAL DESCRIPTION PPMU and the DCL would have a few benets including: The AD53508 is a custom dual-channel parametric measure- ment circuit for use in semiconductor automatic test equipment. 1. Accurately measuring low currents. It contains programmable modes to force a pin voltage and 2. Can take parallel measurements by using one PMU per pin. measure its current or to integrate and hold a current value. Alternatively, a current can be forced and the compliance volt- age measured. FUNCTIONAL BLOCK DIAGRAM S8 SENSE SENSE AD53508 S9 EXT RC 40pF S6 DAC1 MAIN C1 S7 INT/IM S10 DAC2 S11 FORCE VF S4 ENABLE S12 INTEGRATE R1 IF S5 S13 1.25R 1k S14 +2.5V R2 DSR 2mA S17 S15 VM S2 S16 R 10k DIFF OUTPUT IM 200 A UNITY S3 S1 MEAS OUT CON R 1.25R GUARD S18 GUARD REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise Tel: 781/329-4700 www.analog.com under any patent or patent rights of Analog Devices. Fax: 781/326-8703 Analog Devices, Inc., 2001AD53508SPECIFICATIONS (T = 25 C, rated power supplies unless otherwise noted.) A 1 Parameter Condition Min Typ Max Unit VOLTAGE FORCE/MEASURE MODE Voltage Swing, 2 mA Range 2 mA Drive 4+9 V 100 A Drive 5 +12 V ACCURACY Gain (0.1% Tolerance) 0.999 1.001 V/V Offset Error 15 mV Gain Nonlinearity (Relative to Endpoints) 0.02 % of Span Current Measure CMRR (at MEAS OUT) 0.31 mV/V DRIFT Gain Error Temperature Coefcient 20 ppm (PV or MV)/C Offset Drift 100 V/C CURRENT FORCE/MEASURE MODE RANGES 0 (High) 2.0 mA 1 (Low) 200 A ACCURACYHIGH RANGE Transconductance (3% Tolerance) Force Mode 0.776 0.8 0.824 mA/V Transresistance (3% Tolerance) Measure Mode 1.21 1.25 1.29 V/mA Offset Error 40 A Gain Nonlinearity (Relative to Endpoints) 0.05 % of Span Output Compliance Voltage-Induced Transconductance/Error Force Mode 0.2 +0.4 A/V DRIFTHIGH RANGE Gain Error Temperature Coefcient +10/60 ppm (PV or MV)/C Offset Drift 400 nA/C ACCURACYLOW RANGE Transconductance (3% Tolerance) Force Mode 77.6 80 82.4 A/V Transresistance (3% Tolerance) Measure Mode 12.1 12.5 12.9 V/mA Offset Error 4 A Gain Nonlinearity (Relative to Endpoints) 0.05 % of Span Output Compliance Voltage-Induced Transconductance/Error Force Mode 0.02 +0.04 A/V DRIFTLOW RANGE Gain Error Temperature Coefcient +10/60 ppm (PV or MV)/C Offset Drift 40 nA/C CURRENT MEASURE INTEGRATE MODE RANGES High 20.0 A Medium 2.0 A Low 200 nA ACCURACYHIGH RANGE Transresistance Error (3% Tolerance) 0.121 0.125 0.129 V/ A Offset Error 400 nA Gain Nonlinearity (Relative to Endpoints) 0.05 % of Span Output Compliance Voltage-Induced Transresistance Error 2.5 nA/V of Output DRIFTHIGH RANGE Gain Error Temperature Coefcient 20 ppm MV/C Offset Drift 2 nA/C ACCURACYMEDIUM RANGE Transresistance Error (3% Tolerance) 1.21 1.25 1.29 V/ A Offset Error 40 nA Gain Nonlinearity (Relative to Endpoints) 0.05 % of Span Output Compliance Voltage-Induced Transresistance Error 0.25 nA/V of Output DRIFT MEDIUM RANGE Gain Error Temperature Coefcient 20 ppm MV/C Offset Drift 250 pA/C 2 REV. A

Tariff Desc

8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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DALLAS / MAXIM
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