Product Information

AT45DB641E-MHN-T

AT45DB641E-MHN-T electronic component of Dialog Semiconductor

Datasheet
NOR Flash 64Mb, 1.7V, 85Mhz SPI Serial Flash

Manufacturer: Dialog Semiconductor
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Price (USD)

1: USD 6.6825 ea
Line Total: USD 6.68

14792 - Global Stock
Ships to you between
Thu. 02 May to Mon. 06 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
14220 - Global Stock


Ships to you between Thu. 02 May to Mon. 06 May

MOQ : 1
Multiples : 1

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AT45DB641E-MHN-T
Dialog Semiconductor

1 : USD 5.75
10 : USD 5.313
100 : USD 4.761
250 : USD 4.761
500 : USD 4.5195
1000 : USD 4.3355
2500 : USD 4.209
6000 : USD 4.1515
12000 : USD 4.0365

     
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AT45DB641E 64-Mbit DataFlash (with Extra 2-Mbits), 1.7V Minimum SPI Serial Flash Memory Features Single 1.7V - 3.6V supply Serial Peripheral Interface (SPI) compatible Supports SPI modes 0 and 3 Supports RapidS operation Continuous read capability through entire array Up to 85MHz Low-power read option up to 15MHz Clock-to-output time (t ) of 8ns maximum V User configurable page size 256 bytes per page 264 bytes per page (default) Page size can be factory pre-configured for 256 bytes Two fully independent SRAM data buffers (256/264 bytes) Allows receiving data while reprogramming the main memory array Flexible programming options Byte/Page Program (1 to 256/264 bytes) directly into main memory Buffer Write Buffer to Main Memory Page Program Flexible erase options Page Erase (256/264 bytes) Block Erase (2KB) Sector Erase (256KB) Chip Erase (64-Mbits) Program and Erase Suspend/Resume Advanced hardware and software data protection features Individual sector protection Individual sector lockdown to make any sector permanently read-only 128-byte, One-Time Programmable (OTP) Security Register 64 bytes factory programmed with a unique identifier 64 bytes user programmable Hardware and software controlled reset options JEDEC Standard Manufacturer and Device ID Read Low-power dissipation 400nA Ultra-Deep Power-Down current (typical) 5A Deep Power-Down current (typical) 25A Standby current (typical) 7mA Active Read current (typical) Endurance: 100,000 program/erase cycles per page minimum Data retention: 20 years Complies with full industrial temperature range Green (Pb/Halide-free/RoHS compliant) packaging options 8-lead SOIC (0.208 wide) 8-pad Ultra-thin DFN (5 x 6 x 0.6mm) 8-pad Very-thin DFN (6 x 8 x 1.0mm) 44-ball dBGA (6 x 8 modified ball array) Die in Wafer Form DS-45DB641E-027KDFLASH2/2019Description The AT45DB641E is a 1.7V minimum, serial-interface sequential access Flash memory ideally suited for a wide variety of digital voice, image, program code, and data storage applications. The AT45DB641E also supports the RapidS serial interface for applications requiring very high speed operation. Its 69,206,016 bits of memory are organized as 32,768 pages of 256 bytes or 264 bytes each. In addition to the main memory, the AT45DB641E also contains two SRAM buffers of 256/264 bytes each. Interleaving between both buffers can dramatically increase a system s ability to write a continuous data stream. In addition, the SRAM buffers can be used as additional system scratch pad memory, and 2 E PROM emulation (bit or byte alterability) can be easily handled with a self-contained three step read-modify-write operation. Unlike conventional Flash memories that are accessed randomly with multiple address lines and a parallel interface, the DataFlash uses a serial interface to sequentially access its data. The simple sequential access dramatically reduces active pin count, facilitates simplified hardware layout, increases system reliability, minimizes switching noise, and reduces package size. The device is optimized for use in many commercial and industrial applications where high-density, low-pin count, low-voltage, and low-power are essential. To allow for simple in-system re-programmability, the AT45DB641E does not require high input voltages for programming. The device operates from a single 1.7V to 3.6V power supply for the erase and program and read operations. The AT45DB641E is enabled through the Chip Select pin (CS) and accessed via a 3-wire interface consisting of the Serial Input (SI), Serial Output (SO), and the Serial Clock (SCK). All programming and erase cycles are self-timed. 1. Pin Configurations and Pinouts Figure 1-1. Pinouts 8-lead SOIC 8-pad UDFN Top View Top View (through package) SI 1 8 SO SI 1 8 SO SCK 2 7 GND SCK 2 7 GND RESET 3 6 V CC RESET 3 6 V CC CS 4 5 WP CS 4 5 WP 44-ball dBGA Note: 1. The metal pad on the bottom of the DFN package is not internally Top View connected to a voltage potential.This pad can be a no connect 1 2 3 4 5 6 or connected to GND. Care must be taken to avoid the Metal Pad shorting on PCB tracks. A (NC) (NC) (NC) (NC) (NC) B (NC) SI RST CS (NC) C (NC) SI SCK RST CS (NC) D (NC) SI SCK RST CS (NC) E (NC) SO GND Vcc WP (NC) F (NC) SO GND Vcc WP (NC) G (NC) SO Vcc WP (NC) (NC) (NC) (NC) (NC) (NC) H AT45DB641E 2 DS-45DB641E-027KDFLASH2/2019

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)
ADESTO
Adesto Technologies
Dialog Semiconductor GmbH
DLG
Echelon / Adesto
Echelon Corporation

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