Product Information

SY89852UMG

Product Image X-ON

Encoders, Decoders, Multiplexers & Demultiplexers 2.5V3.3V Low Power 2:1 LVPECL MUX with Internal Input Termination
Manufacturer: Microchip


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From 4.4503

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SY89852UMG
Microchip

1 : $ 5.8835
25 : $ 4.9028
100 : $ 4.4503

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0 - Global Stock


Ships to you between Fri. 11 Dec to Thu. 17 Dec
Calender

MOQ : 100
Multiples : 100

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SY89852UMG
Microchip

100 : $ 4.7731
300 : $ 4.5992

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Manufacturer
Microchip
Product Category
Encoders, Decoders, Multiplexers & Demultiplexers
RoHS - XON
Y Icon ROHS
Product
Multiplexers
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.375 V
Maximum Operating Temperature
+85 C
Mounting Style
Smd/Smt
Package / Case
QFN-16
Packaging
Tube
Series
Sy89852u
Brand
Microchip Technology / Micrel
Minimum Operating Temperature
- 40 C
Pd - Power Dissipation
58 mW
Factory Pack Quantity :
100
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SY89852U Precision Low Power Differential 2:1 LVPECL MUX with Internal Termination General Description The SY89852U is a 2.5V/3.3V precision, high- ? speed, 2:1 differential MUX capable of handling Precision Edge clocks up to 2.5GHz and data streams up to Features 2.5Gbps. ? Provides a low jitter copy of the selected input The differential input includes Micrel?s unique, patent pending 3-pin input termination architecture that ? Superior alternative to the EP58 2:1 MUX allows users to interface to any differential signal ? Low power: 58mW (2.5V nominal, no load) (AC- or DC-coupled) as small as 100mV (200mV ) pp ? Guaranteed AC performance over temperature without any level shifting or termination resistor and supply voltage: networks in the signal path. The unique, patent input ? DC- to > 2.5Gbps data rate throughput isolation design minimizes crosstalk minimizing ? DC- to > 2.5GHz clock f MAX crosstalk induced jitter. The outputs are 800mV ? < 340ps In-to-Out t pd LVPECL, with extremely fast rise/fall time ? < 180ps t /t time r f guaranteed to be less than 180ps. ? Ultra-low Jitter Design: The SY89852U operates from a 2.5V ?5% supply or ? <1ps random jitter (rms) a 3.3V ?10% supply and is guaranteed over the full ? <10ps deterministic jitter (pp) industrial temperature range of ?40?C to +85?C. ? <10ps total jitter (clock) (pp) The SY89852U is part of Micrel?s high-speed, ? <0.7ps crosstalk induced jitter ? (rms) Precision Edge product line. All support ? Unique, patent-pending input isolation design documentation can be found on Micrel?s web site at: minimizes crosstalk www.micrel.com. ? Unique, patent pending input termination and VT pin accepts DC-coupled and AC-coupled inputs (CML, PECL, LVDS) Typical Applications ? Typical 800mV (100k) LVPECL output swing ? Power supply 2.5V +5% or 3.3V +10% o o ? Industrial temperature range ?40 C to +85 C ? Available in ultra-small (3mm x 3mm) 16-pin QFN package Applications ? Redundant clock distribution ? SONET/SDH clock/data distribution ? Loopback ? Fibre Channel distribution Markets ? LAN/WAN ? Enterprise servers ? ATE ? Test and measurement Precision Edge is a registered trademark of Micrel, Inc. October 2008 M9999-100208-D hbwhelp@micrel.com or (408) 955-1690 SY89852U Precision Low Power Differential 2:1 LVPECL MUX with Internal Termination General Description The SY89852U is a 2.5V/3.3V precision, high- ? speed, 2:1 differential MUX capable of handling Precision Edge clocks up to 2.5GHz and data streams up to Features 2.5Gbps. ? Provides a low jitter copy of the selected input The differential input includes Micrel?s unique, patent pending 3-pin input termination architecture that ? Superior alternative to the EP58 2:1 MUX allows users to interface to any differential signal ? Low power: 58mW (2.5V nominal, no load) (AC- or DC-coupled) as small as 100mV (200mV ) pp ? Guaranteed AC performance over temperature without any level shifting or termination resistor and supply voltage: networks in the signal path. The unique, patent input ? DC- to > 2.5Gbps data rate throughput isolation design minimizes crosstalk minimizing ? DC- to > 2.5GHz clock f MAX crosstalk induced jitter. The outputs are 800mV ? < 340ps In-to-Out t pd LVPECL, with extremely fast rise/fall time ? < 180ps t /t time r f guaranteed to be less than 180ps. ? Ultra-low Jitter Design: The SY89852U operates from a 2.5V ?5% supply or ? <1ps random jitter (rms) a 3.3V ?10% supply and is guaranteed over the full ? <10ps deterministic jitter (pp) industrial temperature range of ?40?C to +85?C. ? <10ps total jitter (clock) (pp) The SY89852U is part of Micrel?s high-speed, ? <0.7ps crosstalk induced jitter ? (rms) Precision Edge product line. All support ? Unique, patent-pending input isolation design documentation can be found on Micrel?s web site at: minimizes crosstalk www.micrel.com. ? Unique, patent pending input termination and VT pin accepts DC-coupled and AC-coupled inputs (CML, PECL, LVDS) Typical Applications ? Typical 800mV (100k) LVPECL output swing ? Power supply 2.5V +5% or 3.3V +10% o o ? Industrial temperature range ?40 C to +85 C ? Available in ultra-small (3mm x 3mm) 16-pin QFN package Applications ? Redundant clock distribution ? SONET/SDH clock/data distribution ? Loopback ? Fibre Channel distribution Markets ? LAN/WAN ? Enterprise servers ? ATE ? Test and measurement Precision Edge is a registered trademark of Micrel, Inc. October 2008 M9999-100208-D hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY89852U (1) Ordering Information Part Number Package Operating Package Marking Lead Type Range Finish NiPdAu SY89852UMG QFN-16 Industrial 852U with bar-line designator Pb-Free (2) NiPdAu SY89852UMGTR QFN-16 Industrial 852U with bar-line designator Pb-Free Notes: 1. Contact factory for die availability. Dice are guaranteed at T = 25?C, DC Electrical Only. A 2. Tape and Reel. Pin Configuration 16-Pin QFN October 2008 2 M9999-100208-D hbwhelp@micrel.com or (408) 955-1690 SY89852U Precision Low Power Differential 2:1 LVPECL MUX with Internal Termination General Description The SY89852U is a 2.5V/3.3V precision, high- ? speed, 2:1 differential MUX capable of handling Precision Edge clocks up to 2.5GHz and data streams up to Features 2.5Gbps. ? Provides a low jitter copy of the selected input The differential input includes Micrel?s unique, patent pending 3-pin input termination architecture that ? Superior alternative to the EP58 2:1 MUX allows users to interface to any differential signal ? Low power: 58mW (2.5V nominal, no load) (AC- or DC-coupled) as small as 100mV (200mV ) pp ? Guaranteed AC performance over temperature without any level shifting or termination resistor and supply voltage: networks in the signal path. The unique, patent input ? DC- to > 2.5Gbps data rate throughput isolation design minimizes crosstalk minimizing ? DC- to > 2.5GHz clock f MAX crosstalk induced jitter. The outputs are 800mV ? < 340ps In-to-Out t pd LVPECL, with extremely fast rise/fall time ? < 180ps t /t time r f guaranteed to be less than 180ps. ? Ultra-low Jitter Design: The SY89852U operates from a 2.5V ?5% supply or ? <1ps random jitter (rms) a 3.3V ?10% supply and is guaranteed over the full ? <10ps deterministic jitter (pp) industrial temperature range of ?40?C to +85?C. ? <10ps total jitter (clock) (pp) The SY89852U is part of Micrel?s high-speed, ? <0.7ps crosstalk induced jitter ? (rms) Precision Edge product line. All support ? Unique, patent-pending input isolation design documentation can be found on Micrel?s web site at: minimizes crosstalk www.micrel.com. ? Unique, patent pending input termination and VT pin accepts DC-coupled and AC-coupled inputs (CML, PECL, LVDS) Typical Applications ? Typical 800mV (100k) LVPECL output swing ? Power supply 2.5V +5% or 3.3V +10% o o ? Industrial temperature range ?40 C to +85 C ? Available in ultra-small (3mm x 3mm) 16-pin QFN package Applications ? Redundant clock distribution ? SONET/SDH clock/data distribution ? Loopback ? Fibre Channel distribution Markets ? LAN/WAN ? Enterprise servers ? ATE ? Test and measurement Precision Edge is a registered trademark of Micrel, Inc. October 2008 M9999-100208-D hbwhelp@micrel.com or (408) 955-1690 SY89852U Precision Low Power Differential 2:1 LVPECL MUX with Internal Termination General Description The SY89852U is a 2.5V/3.3V precision, high- ? speed, 2:1 differential MUX capable of handling Precision Edge clocks up to 2.5GHz and data streams up to Features 2.5Gbps. ? Provides a low jitter copy of the selected input The differential input includes Micrel?s unique, patent pending 3-pin input termination architecture that ? Superior alternative to the EP58 2:1 MUX allows users to interface to any differential signal ? Low power: 58mW (2.5V nominal, no load) (AC- or DC-coupled) as small as 100mV (200mV ) pp ? Guaranteed AC performance over temperature without any level shifting or termination resistor and supply voltage: networks in the signal path. The unique, patent input ? DC- to > 2.5Gbps data rate throughput isolation design minimizes crosstalk minimizing ? DC- to > 2.5GHz clock f MAX crosstalk induced jitter. The outputs are 800mV ? < 340ps In-to-Out t pd LVPECL, with extremely fast rise/fall time ? < 180ps t /t time r f guaranteed to be less than 180ps. ? Ultra-low Jitter Design: The SY89852U operates from a 2.5V ?5% supply or ? <1ps random jitter (rms) a 3.3V ?10% supply and is guaranteed over the full ? <10ps deterministic jitter (pp) industrial temperature range of ?40?C to +85?C. ? <10ps total jitter (clock) (pp) The SY89852U is part of Micrel?s high-speed, ? <0.7ps crosstalk induced jitter ? (rms) Precision Edge product line. All support ? Unique, patent-pending input isolation design documentation can be found on Micrel?s web site at: minimizes crosstalk www.micrel.com. ? Unique, patent pending input termination and VT pin accepts DC-coupled and AC-coupled inputs (CML, PECL, LVDS) Typical Applications ? Typical 800mV (100k) LVPECL output swing ? Power supply 2.5V +5% or 3.3V +10% o o ? Industrial temperature range ?40 C to +85 C ? Available in ultra-small (3mm x 3mm) 16-pin QFN package Applications ? Redundant clock distribution ? SONET/SDH clock/data distribution ? Loopback ? Fibre Channel distribution Markets ? LAN/WAN ? Enterprise servers ? ATE ? Test and measurement Precision Edge is a registered trademark of Micrel, Inc. October 2008 M9999-100208-D hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY89852U (1) Ordering Information Part Number Package Operating Package Marking Lead Type Range Finish NiPdAu SY89852UMG QFN-16 Industrial 852U with bar-line designator Pb-Free (2) NiPdAu SY89852UMGTR QFN-16 Industrial 852U with bar-line designator Pb-Free Notes: 1. Contact factory for die availability. Dice are guaranteed at T = 25?C, DC Electrical Only. A 2. Tape and Reel. Pin Configuration 16-Pin QFN October 2008 2 M9999-100208-D hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY89852U Pin Description Pin Number Pin Name Pin Function Differential Input: This input pair is the signal to be buffered. These inputs accept AC- or DC-coupled signals as small as 100mV (200mVPP). Each pin of this pair 1,2, IN, /IN internally terminates to a VT pin through 50?. Note that this input will default to 3,4 an indeterminate state if left open. Please refer to the ?Input Interface Applications? section for more details. Input Termination Center-Tap: Each side of the differential input pair terminates to this pin. The VT pin provides a center-tap to a termination network for 16,5 VT maximum interface flexibility. See ?Input Interface Applications? section for more details. Positive Power Supply. Bypass with 0.1 ?F ??0.01 ?F low ESR capacitors as close 8,13 VCC to the V pin as possible. CC Differential 100K LVPECL Output: This LVPECL output is the output of the device. Terminate through 50? to V ?2V. PECL output requires DC path to CC 12,9 Q, /Q ground. Thus, AC-coupled applications require pull-down resistors. See ?Output Interface Applications? section. GND, Ground. Ground pin and exposed pad must be connected to the same ground 10,11,14,15 Exposed Pad plane. This single-ended TTL/CMOS-compatible input selects the inputs to the 6 SEL multiplexer. Note that this input is internally connected to a 25K? pull-up resistor and will default to logic HIGH state if left open. 7 NC No connect. Truth Table (1) IN0 IN1 SEL Q 0 X 0 0 1 X 0 1 X 0 1 0 X 1 1 1 Note: 1. SEL is connected to a 25k? pull-up resistor and will default to logic high if left open. Functional Block Diagram October 2008 3 M9999-100208-D hbwhelp@micrel.com or (408) 955-1690 SY89852U Precision Low Power Differential 2:1 LVPECL MUX with Internal Termination General Description The SY89852U is a 2.5V/3.3V precision, high- ? speed, 2:1 differential MUX capable of handling Precision Edge clocks up to 2.5GHz and data streams up to Features 2.5Gbps. ? Provides a low jitter copy of the selected input The differential input includes Micrel?s unique, patent pending 3-pin input termination architecture that ? Superior alternative to the EP58 2:1 MUX allows users to interface to any differential signal ? Low power: 58mW (2.5V nominal, no load) (AC- or DC-coupled) as small as 100mV (200mV ) pp ? Guaranteed AC performance over temperature without any level shifting or termination resistor and supply voltage: networks in the signal path. The unique, patent input ? DC- to > 2.5Gbps data rate throughput isolation design minimizes crosstalk minimizing ? DC- to > 2.5GHz clock f MAX crosstalk induced jitter. The outputs are 800mV ? < 340ps In-to-Out t pd LVPECL, with extremely fast rise/fall time ? < 180ps t /t time r f guaranteed to be less than 180ps. ? Ultra-low Jitter Design: The SY89852U operates from a 2.5V ?5% supply or ? <1ps random jitter (rms) a 3.3V ?10% supply and is guaranteed over the full ? <10ps deterministic jitter (pp) industrial temperature range of ?40?C to +85?C. ? <10ps total jitter (clock) (pp) The SY89852U is part of Micrel?s high-speed, ? <0.7ps crosstalk induced jitter ? (rms) Precision Edge product line. All support ? Unique, patent-pending input isolation design documentation can be found on Micrel?s web site at: minimizes crosstalk www.micrel.com. ? Unique, patent pending input termination and VT pin accepts DC-coupled and AC-coupled inputs (CML, PECL, LVDS) Typical Applications ? Typical 800mV (100k) LVPECL output swing ? Power supply 2.5V +5% or 3.3V +10% o o ? Industrial temperature range ?40 C to +85 C ? Available in ultra-small (3mm x 3mm) 16-pin QFN package Applications ? Redundant clock distribution ? SONET/SDH clock/data distribution ? Loopback ? Fibre Channel distribution Markets ? LAN/WAN ? Enterprise servers ? ATE ? Test and measurement Precision Edge is a registered trademark of Micrel, Inc. October 2008 M9999-100208-D hbwhelp@micrel.com or (408) 955-1690 SY89852U Precision Low Power Differential 2:1 LVPECL MUX with Internal Termination General Description The SY89852U is a 2.5V/3.3V precision, high- ? speed, 2:1 differential MUX capable of handling Precision Edge clocks up to 2.5GHz and data streams up to Features 2.5Gbps. ? Provides a low jitter copy of the selected input The differential input includes Micrel?s unique, patent pending 3-pin input termination architecture that ? Superior alternative to the EP58 2:1 MUX allows users to interface to any differential signal ? Low power: 58mW (2.5V nominal, no load) (AC- or DC-coupled) as small as 100mV (200mV ) pp ? Guaranteed AC performance over temperature without any level shifting or termination resistor and supply voltage: networks in the signal path. The unique, patent input ? DC- to > 2.5Gbps data rate throughput isolation design minimizes crosstalk minimizing ? DC- to > 2.5GHz clock f MAX crosstalk induced jitter. The outputs are 800mV ? < 340ps In-to-Out t pd LVPECL, with extremely fast rise/fall time ? < 180ps t /t time r f guaranteed to be less than 180ps. ? Ultra-low Jitter Design: The SY89852U operates from a 2.5V ?5% supply or ? <1ps random jitter (rms) a 3.3V ?10% supply and is guaranteed over the full ? <10ps deterministic jitter (pp) industrial temperature range of ?40?C to +85?C. ? <10ps total jitter (clock) (pp) The SY89852U is part of Micrel?s high-speed, ? <0.7ps crosstalk induced jitter ? (rms) Precision Edge product line. All support ? Unique, patent-pending input isolation design documentation can be found on Micrel?s web site at: minimizes crosstalk www.micrel.com. ? Unique, patent pending input termination and VT pin accepts DC-coupled and AC-coupled inputs (CML, PECL, LVDS) Typical Applications ? Typical 800mV (100k) LVPECL output swing ? Power supply 2.5V +5% or 3.3V +10% o o ? Industrial temperature range ?40 C to +85 C ? Available in ultra-small (3mm x 3mm) 16-pin QFN package Applications ? Redundant clock distribution ? SONET/SDH clock/data distribution ? Loopback ? Fibre Channel distribution Markets ? LAN/WAN ? Enterprise servers ? ATE ? Test and measurement Precision Edge is a registered trademark of Micrel, Inc. October 2008 M9999-100208-D hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY89852U (1) Ordering Information Part Number Package Operating Package Marking Lead Type Range Finish NiPdAu SY89852UMG QFN-16 Industrial 852U with bar-line designator Pb-Free (2) NiPdAu SY89852UMGTR QFN-16 Industrial 852U with bar-line designator Pb-Free Notes: 1. Contact factory for die availability. Dice are guaranteed at T = 25?C, DC Electrical Only. A 2. Tape and Reel. Pin Configuration 16-Pin QFN October 2008 2 M9999-100208-D hbwhelp@micrel.com or (408) 955-1690 SY89852U Precision Low Power Differential 2:1 LVPECL MUX with Internal Termination General Description The SY89852U is a 2.5V/3.3V precision, high- ? speed, 2:1 differential MUX capable of handling Precision Edge clocks up to 2.5GHz and data streams up to Features 2.5Gbps. ? Provides a low jitter copy of the selected input The differential input includes Micrel?s unique, patent pending 3-pin input termination architecture that ? Superior alternative to the EP58 2:1 MUX allows users to interface to any differential signal ? Low power: 58mW (2.5V nominal, no load) (AC- or DC-coupled) as small as 100mV (200mV ) pp ? Guaranteed AC performance over temperature without any level shifting or termination resistor and supply voltage: networks in the signal path. The unique, patent input ? DC- to > 2.5Gbps data rate throughput isolation design minimizes crosstalk minimizing ? DC- to > 2.5GHz clock f MAX crosstalk induced jitter. The outputs are 800mV ? < 340ps In-to-Out t pd LVPECL, with extremely fast rise/fall time ? < 180ps t /t time r f guaranteed to be less than 180ps. ? Ultra-low Jitter Design: The SY89852U operates from a 2.5V ?5% supply or ? <1ps random jitter (rms) a 3.3V ?10% supply and is guaranteed over the full ? <10ps deterministic jitter (pp) industrial temperature range of ?40?C to +85?C. ? <10ps total jitter (clock) (pp) The SY89852U is part of Micrel?s high-speed, ? <0.7ps crosstalk induced jitter ? (rms) Precision Edge product line. All support ? Unique, patent-pending input isolation design documentation can be found on Micrel?s web site at: minimizes crosstalk www.micrel.com. ? Unique, patent pending input termination and VT pin accepts DC-coupled and AC-coupled inputs (CML, PECL, LVDS) Typical Applications ? Typical 800mV (100k) LVPECL output swing ? Power supply 2.5V +5% or 3.3V +10% o o ? Industrial temperature range ?40 C to +85 C ? Available in ultra-small (3mm x 3mm) 16-pin QFN package Applications ? Redundant clock distribution ? SONET/SDH clock/data distribution ? Loopback ? Fibre Channel distribution Markets ? LAN/WAN ? Enterprise servers ? ATE ? Test and measurement Precision Edge is a registered trademark of Micrel, Inc. October 2008 M9999-100208-D hbwhelp@micrel.com or (408) 955-1690 SY89852U Precision Low Power Differential 2:1 LVPECL MUX with Internal Termination General Description The SY89852U is a 2.5V/3.3V precision, high- ? speed, 2:1 differential MUX capable of handling Precision Edge clocks up to 2.5GHz and data streams up to Features 2.5Gbps. ? Provides a low jitter copy of the selected input The differential input includes Micrel?s unique, patent pending 3-pin input termination architecture that ? Superior alternative to the EP58 2:1 MUX allows users to interface to any differential signal ? Low power: 58mW (2.5V nominal, no load) (AC- or DC-coupled) as small as 100mV (200mV ) pp ? Guaranteed AC performance over temperature without any level shifting or termination resistor and supply voltage: networks in the signal path. The unique, patent input ? DC- to > 2.5Gbps data rate throughput isolation design minimizes crosstalk minimizing ? DC- to > 2.5GHz clock f MAX crosstalk induced jitter. The outputs are 800mV ? < 340ps In-to-Out t pd LVPECL, with extremely fast rise/fall time ? < 180ps t /t time r f guaranteed to be less than 180ps. ? Ultra-low Jitter Design: The SY89852U operates from a 2.5V ?5% supply or ? <1ps random jitter (rms) a 3.3V ?10% supply and is guaranteed over the full ? <10ps deterministic jitter (pp) industrial temperature range of ?40?C to +85?C. ? <10ps total jitter (clock) (pp) The SY89852U is part of Micrel?s high-speed, ? <0.7ps crosstalk induced jitter ? (rms) Precision Edge product line. All support ? Unique, patent-pending input isolation design documentation can be found on Micrel?s web site at: minimizes crosstalk www.micrel.com. ? Unique, patent pending input termination and VT pin accepts DC-coupled and AC-coupled inputs (CML, PECL, LVDS) Typical Applications ? Typical 800mV (100k) LVPECL output swing ? Power supply 2.5V +5% or 3.3V +10% o o ? Industrial temperature range ?40 C to +85 C ? Available in ultra-small (3mm x 3mm) 16-pin QFN package Applications ? Redundant clock distribution ? SONET/SDH clock/data distribution ? Loopback ? Fibre Channel distribution Markets ? LAN/WAN ? Enterprise servers ? ATE ? Test and measurement Precision Edge is a registered trademark of Micrel, Inc. October 2008 M9999-100208-D hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY89852U (1) Ordering Information Part Number Package Operating Package Marking Lead Type Range Finish NiPdAu SY89852UMG QFN-16 Industrial 852U with bar-line designator Pb-Free (2) NiPdAu SY89852UMGTR QFN-16 Industrial 852U with bar-line designator Pb-Free Notes: 1. Contact factory for die availability. Dice are guaranteed at T = 25?C, DC Electrical Only. A 2. Tape and Reel. Pin Configuration 16-Pin QFN October 2008 2 M9999-100208-D hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY89852U Pin Description Pin Number Pin Name Pin Function Differential Input: This input pair is the signal to be buffered. These inputs accept AC- or DC-coupled signals as small as 100mV (200mVPP). Each pin of this pair 1,2, IN, /IN internally terminates to a VT pin through 50?. Note that this input will default to 3,4 an indeterminate state if left open. Please refer to the ?Input Interface Applications? section for more details. Input Termination Center-Tap: Each side of the differential input pair terminates to this pin. The VT pin provides a center-tap to a termination network for 16,5 VT maximum interface flexibility. See ?Input Interface Applications? section for more details. Positive Power Supply. Bypass with 0.1 ?F ??0.01 ?F low ESR capacitors as close 8,13 VCC to the V pin as possible. CC Differential 100K LVPECL Output: This LVPECL output is the output of the device. Terminate through 50? to V ?2V. PECL output requires DC path to CC 12,9 Q, /Q ground. Thus, AC-coupled applications require pull-down resistors. See ?Output Interface Applications? section. GND, Ground. Ground pin and exposed pad must be connected to the same ground 10,11,14,15 Exposed Pad plane. This single-ended TTL/CMOS-compatible input selects the inputs to the 6 SEL multiplexer. Note that this input is internally connected to a 25K? pull-up resistor and will default to logic HIGH state if left open. 7 NC No connect. Truth Table (1) IN0 IN1 SEL Q 0 X 0 0 1 X 0 1 X 0 1 0 X 1 1 1 Note: 1. SEL is connected to a 25k? pull-up resistor and will default to logic high if left open. Functional Block Diagram October 2008 3 M9999-100208-D hbwhelp@micrel.com or (408) 955-1690

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8542.31.00 61 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products8542.31.00

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