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AT91SAM7SE512B-AUR

Product Image X-ON

ARM Microcontrollers - MCU IND TEMP MRL B
Manufacturer: Microchip


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Manufacturer
Microchip
Product Category
ARM Microcontrollers - MCU
RoHS - XON
Y Icon ROHS
Core
Arm7tdmi
Data Bus Width
32 bit /16 bit
Maximum Clock Frequency
55 Mhz
Program Memory Size
512 Kb
Data RAM Size
32 Kb
Operating Supply Voltage
1.8 V
Maximum Operating Temperature
+85 C
Package / Case
LQFP-128
Mounting Style
Smd/Smt
Packaging
Reel
Product
Mcu
Program Memory Type
Flash
Series
Sam7s/Se
Brand
Microchip Technology / Atmel
Data Ram Type
Ram
Interface Type
I2c, Spi, Usart, Usb
Number Of I/Os
88 I/O
Adc Resolution
10 Bit
Analog Supply Voltage
3.3 V
I/O Voltage
1.65 v to 3.6 V
Minimum Operating Temperature
- 40 C
Number Of Adc Channels
8 Channel
Number Of Timers/Counters
3 X 16 Bit
Processor Series
Sam7s
Factory Pack Quantity :
750
Supply Voltage - Max
1.95 V
Supply Voltage - Min
1.65 V
Watchdog Timers
Watchdog Timer
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Features ? ? ? ? Incorporates the ARM7TDMI ARM Thumb Processor ? High-performance 32-bit RISC Architecture ? High-density 16-bit Instruction Set ? Leader in MIPS/Watt ? In-circuit Emulation, Debug Communication Channel Support ? EmbeddedICE ? Internal High-speed Flash ? 512 Kbytes, Organized in Two Contiguous Banks of 1024 Pages of 256 Bytes Dual Plane (SAM7SE512) AT91SAM ? 256 Kbytes (SAM7SE256) Organized in One Bank of 1024 Pages of 256 Bytes Single Plane (SAM7SE256) ARM-based ? 32 Kbytes (SAM7SE32) Organized in One Bank of 256 Pages of 128 Bytes Single Plane (SAM7SE32) Flash MCU ? Single Cycle Access at Up to 30 MHz in Worst Case Conditions ? Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed ? Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms ? 10,000 Erase Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, SAM7SE512 Flash Security Bit SAM7SE256 ? Fast Flash Programming Interface for High Volume Production ? 32 Kbytes (SAM7SE512/256) or 8 Kbytes (SAM7SE32) of Internal SAM7SE32 High-speed SRAM, Single-cycle Access at Maximum Speed ? One External Bus Interface (EBI) ? ? Supports SDRAM, Static Memory, Glueless Connection to CompactFlash and ECC-enabled NAND Flash ? Memory Controller (MC) ? Embedded Flash Controller ? Memory Protection Unit ? Abort Status and Misalignment Detection ? Reset Controller (RSTC) ? Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout Detector ? Provides External Reset Signal Shaping and Reset Source Status ? Clock Generator (CKGR) ? Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL ? Power Management Controller (PMC) ? Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode ? Three Programmable External Clock Signals ? Advanced Interrupt Controller (AIC) ? Individually Maskable, Eight-level Priority, Vectored Interrupt Sources ? Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected ? Debug Unit (DBGU) ? Two-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention ? Mode for General Purpose Two-wire UART Serial Communication ? Periodic Interval Timer (PIT) ? 20-bit Programmable Counter plus 12-bit Interval Counter ? Windowed Watchdog (WDT) 6222H?ATARM?25-Jan-12 ? 12-bit key-protected Programmable Counter Features ? ? ? ? Incorporates the ARM7TDMI ARM Thumb Processor ? High-performance 32-bit RISC Architecture ? High-density 16-bit Instruction Set ? Leader in MIPS/Watt ? In-circuit Emulation, Debug Communication Channel Support ? EmbeddedICE ? Internal High-speed Flash ? 512 Kbytes, Organized in Two Contiguous Banks of 1024 Pages of 256 Bytes Dual Plane (SAM7SE512) AT91SAM ? 256 Kbytes (SAM7SE256) Organized in One Bank of 1024 Pages of 256 Bytes Single Plane (SAM7SE256) ARM-based ? 32 Kbytes (SAM7SE32) Organized in One Bank of 256 Pages of 128 Bytes Single Plane (SAM7SE32) Flash MCU ? Single Cycle Access at Up to 30 MHz in Worst Case Conditions ? Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed ? Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms ? 10,000 Erase Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, SAM7SE512 Flash Security Bit SAM7SE256 ? Fast Flash Programming Interface for High Volume Production ? 32 Kbytes (SAM7SE512/256) or 8 Kbytes (SAM7SE32) of Internal SAM7SE32 High-speed SRAM, Single-cycle Access at Maximum Speed ? One External Bus Interface (EBI) ? ? Supports SDRAM, Static Memory, Glueless Connection to CompactFlash and ECC-enabled NAND Flash ? Memory Controller (MC) ? Embedded Flash Controller ? Memory Protection Unit ? Abort Status and Misalignment Detection ? Reset Controller (RSTC) ? Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout Detector ? Provides External Reset Signal Shaping and Reset Source Status ? Clock Generator (CKGR) ? Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL ? Power Management Controller (PMC) ? Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode ? Three Programmable External Clock Signals ? Advanced Interrupt Controller (AIC) ? Individually Maskable, Eight-level Priority, Vectored Interrupt Sources ? Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected ? Debug Unit (DBGU) ? Two-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention ? Mode for General Purpose Two-wire UART Serial Communication ? Periodic Interval Timer (PIT) ? 20-bit Programmable Counter plus 12-bit Interval Counter ? Windowed Watchdog (WDT) 6222H?ATARM?25-Jan-12 ? 12-bit key-protected Programmable Counter? Provides Reset or Interrupt Signals to the System ? Counter May Be Stopped While the Processor is in Debug State or in Idle Mode ? Real-time Timer (RTT) ? 32-bit Free-running Counter with Alarm ? Runs Off the Internal RC Oscillator ? Three Parallel Input/Output Controllers (PIO) ? Eighty-eight Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os ? Input Change Interrupt Capability on Each I/O Line ? Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output ? Schmitt Trigger on All inputs ? Eleven Peripheral DMA Controller (PDC) Channels ? One USB 2.0 Full Speed (12 Mbits per second) Device Port ? On-chip Transceiver, Eight Endpoints, 2688-byte Configurable Integrated FIFOs ? One Synchronous Serial Controller (SSC) ? Independent Clock and Frame Sync Signals for Each Receiver and Transmitter ? I?S Analog Interface Support, Time Division Multiplex Support ? High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer ? Two Universal Synchronous/Asynchronous Receiver Transmitters (USART) ? Infrared Modulation/Demodulation ? Individual Baud Rate Generator, IrDA ? Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support ? Full Modem Line Support on USART1 ? One Master/Slave Serial Peripheral Interfaces (SPI) ? 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects ? One Three-channel 16-bit Timer/Counter (TC) ? Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel ? Double PWM Generation, Capture/Waveform Mode, Up/Down Capability ? One Four-channel 16-bit PWM Controller (PWMC) ? One Two-wire Interface (TWI) ? Master, Multi-Master and Slave Mode Support, All Two-wire Atmel EEPROMs Supported ? General Call Supported in Slave Mode ? One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os ? ? SAM-BA ? Default Boot program ? Interface with SAM-BA Graphic User Interface ? ? IEEE 1149.1 JTAG Boundary Scan on All Digital Pins ? Four High-current Drive I/O lines, Up to 16 mA Each ? Power Supplies ? Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components ? 1.8V or 3,3V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply ? 1.8V VDDCORE Core Power Supply with Brownout Detector ? Fully Static Operation: ? Up to 55 MHz at 1.8V and 85? C Worst Case Conditions ? Up to 48 MHz at 1.65V and 85? C Worst Case Conditions ? Available in a 128-lead LQFP Green Package, or a 144-ball LFBGA RoHS-compliant Package 2 SAM7SE512/256/32 6222H?ATARM?25-Jan-12 Features ? ? ? ? Incorporates the ARM7TDMI ARM Thumb Processor ? High-performance 32-bit RISC Architecture ? High-density 16-bit Instruction Set ? Leader in MIPS/Watt ? In-circuit Emulation, Debug Communication Channel Support ? EmbeddedICE ? Internal High-speed Flash ? 512 Kbytes, Organized in Two Contiguous Banks of 1024 Pages of 256 Bytes Dual Plane (SAM7SE512) AT91SAM ? 256 Kbytes (SAM7SE256) Organized in One Bank of 1024 Pages of 256 Bytes Single Plane (SAM7SE256) ARM-based ? 32 Kbytes (SAM7SE32) Organized in One Bank of 256 Pages of 128 Bytes Single Plane (SAM7SE32) Flash MCU ? Single Cycle Access at Up to 30 MHz in Worst Case Conditions ? Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed ? Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms ? 10,000 Erase Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, SAM7SE512 Flash Security Bit SAM7SE256 ? Fast Flash Programming Interface for High Volume Production ? 32 Kbytes (SAM7SE512/256) or 8 Kbytes (SAM7SE32) of Internal SAM7SE32 High-speed SRAM, Single-cycle Access at Maximum Speed ? One External Bus Interface (EBI) ? ? Supports SDRAM, Static Memory, Glueless Connection to CompactFlash and ECC-enabled NAND Flash ? Memory Controller (MC) ? Embedded Flash Controller ? Memory Protection Unit ? Abort Status and Misalignment Detection ? Reset Controller (RSTC) ? Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout Detector ? Provides External Reset Signal Shaping and Reset Source Status ? Clock Generator (CKGR) ? Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL ? Power Management Controller (PMC) ? Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode ? Three Programmable External Clock Signals ? Advanced Interrupt Controller (AIC) ? Individually Maskable, Eight-level Priority, Vectored Interrupt Sources ? Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected ? Debug Unit (DBGU) ? Two-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention ? Mode for General Purpose Two-wire UART Serial Communication ? Periodic Interval Timer (PIT) ? 20-bit Programmable Counter plus 12-bit Interval Counter ? Windowed Watchdog (WDT) 6222H?ATARM?25-Jan-12 ? 12-bit key-protected Programmable Counter Features ? ? ? ? Incorporates the ARM7TDMI ARM Thumb Processor ? High-performance 32-bit RISC Architecture ? High-density 16-bit Instruction Set ? Leader in MIPS/Watt ? In-circuit Emulation, Debug Communication Channel Support ? EmbeddedICE ? Internal High-speed Flash ? 512 Kbytes, Organized in Two Contiguous Banks of 1024 Pages of 256 Bytes Dual Plane (SAM7SE512) AT91SAM ? 256 Kbytes (SAM7SE256) Organized in One Bank of 1024 Pages of 256 Bytes Single Plane (SAM7SE256) ARM-based ? 32 Kbytes (SAM7SE32) Organized in One Bank of 256 Pages of 128 Bytes Single Plane (SAM7SE32) Flash MCU ? Single Cycle Access at Up to 30 MHz in Worst Case Conditions ? Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed ? Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms ? 10,000 Erase Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, SAM7SE512 Flash Security Bit SAM7SE256 ? Fast Flash Programming Interface for High Volume Production ? 32 Kbytes (SAM7SE512/256) or 8 Kbytes (SAM7SE32) of Internal SAM7SE32 High-speed SRAM, Single-cycle Access at Maximum Speed ? One External Bus Interface (EBI) ? ? Supports SDRAM, Static Memory, Glueless Connection to CompactFlash and ECC-enabled NAND Flash ? Memory Controller (MC) ? Embedded Flash Controller ? Memory Protection Unit ? Abort Status and Misalignment Detection ? Reset Controller (RSTC) ? Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout Detector ? Provides External Reset Signal Shaping and Reset Source Status ? Clock Generator (CKGR) ? Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL ? Power Management Controller (PMC) ? Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode ? Three Programmable External Clock Signals ? Advanced Interrupt Controller (AIC) ? Individually Maskable, Eight-level Priority, Vectored Interrupt Sources ? Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected ? Debug Unit (DBGU) ? Two-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention ? Mode for General Purpose Two-wire UART Serial Communication ? Periodic Interval Timer (PIT) ? 20-bit Programmable Counter plus 12-bit Interval Counter ? Windowed Watchdog (WDT) 6222H?ATARM?25-Jan-12 ? 12-bit key-protected Programmable Counter? Provides Reset or Interrupt Signals to the System ? Counter May Be Stopped While the Processor is in Debug State or in Idle Mode ? Real-time Timer (RTT) ? 32-bit Free-running Counter with Alarm ? Runs Off the Internal RC Oscillator ? Three Parallel Input/Output Controllers (PIO) ? Eighty-eight Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os ? Input Change Interrupt Capability on Each I/O Line ? Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output ? Schmitt Trigger on All inputs ? Eleven Peripheral DMA Controller (PDC) Channels ? One USB 2.0 Full Speed (12 Mbits per second) Device Port ? On-chip Transceiver, Eight Endpoints, 2688-byte Configurable Integrated FIFOs ? One Synchronous Serial Controller (SSC) ? Independent Clock and Frame Sync Signals for Each Receiver and Transmitter ? I?S Analog Interface Support, Time Division Multiplex Support ? High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer ? Two Universal Synchronous/Asynchronous Receiver Transmitters (USART) ? Infrared Modulation/Demodulation ? Individual Baud Rate Generator, IrDA ? Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support ? Full Modem Line Support on USART1 ? One Master/Slave Serial Peripheral Interfaces (SPI) ? 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects ? One Three-channel 16-bit Timer/Counter (TC) ? Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel ? Double PWM Generation, Capture/Waveform Mode, Up/Down Capability ? One Four-channel 16-bit PWM Controller (PWMC) ? One Two-wire Interface (TWI) ? Master, Multi-Master and Slave Mode Support, All Two-wire Atmel EEPROMs Supported ? General Call Supported in Slave Mode ? One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os ? ? SAM-BA ? Default Boot program ? Interface with SAM-BA Graphic User Interface ? ? IEEE 1149.1 JTAG Boundary Scan on All Digital Pins ? Four High-current Drive I/O lines, Up to 16 mA Each ? Power Supplies ? Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components ? 1.8V or 3,3V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply ? 1.8V VDDCORE Core Power Supply with Brownout Detector ? Fully Static Operation: ? Up to 55 MHz at 1.8V and 85? C Worst Case Conditions ? Up to 48 MHz at 1.65V and 85? C Worst Case Conditions ? Available in a 128-lead LQFP Green Package, or a 144-ball LFBGA RoHS-compliant Package 2 SAM7SE512/256/32 6222H?ATARM?25-Jan-12 SAM7SE512/256/32 1. Description Atmel's SAM7SE Series is a member of its Smart ARM Microcontroller family based on the 32- ? bit ARM7 RISC processor and high-speed Flash memory. ? SAM7SE512 features a 512-Kbyte high-speed Flash and a 32 Kbyte SRAM. ? SAM7SE256 features a 256-Kbyte high-speed Flash and a 32 Kbyte SRAM. ? SAM7SE32 features a 32-Kbyte high-speed Flash and an 8 Kbyte SRAM. It also embeds a large set of peripherals, including a USB 2.0 device, an External Bus Interface (EBI), and a complete set of system functions minimizing the number of external components. The EBI incorporates controllers for synchronous DRAM (SDRAM) and Static memories and features specific circuitry facilitating the interface for NAND Flash, SmartMedia and CompactFlash. The device is an ideal migration path for 8/16-bit microcontroller users looking for additional per- formance, extended memory and higher levels of system integration. The embedded Flash memory can be programmed in-system via the JTAG-ICE interface or via a parallel interface on a production programmer prior to mounting. Built-in lock bits and a secu- rity bit protect the firmware from accidental overwrite and preserve its confidentiality. The SAM7SE Series system controller includes a reset controller capable of managing the power-on sequence of the microcontroller and the complete system. Correct device operation can be monitored by a built-in brownout detector and a watchdog running off an integrated RC oscillator. By combining the ARM7TDMI processor with on-chip Flash and SRAM, and a wide range of peripheral functions, including USART, SPI, External Bus Interface, Timer Counter, RTT and Analog-to-Digital Converters on a monolithic chip, the SAM7SE512/256/32 is a powerful device that provides a flexible, cost-effective solution to many embedded control applications. 1.1 Configuration Summary of the SAM7SE512, SAM7SE256 and SAM7SE32 The SAM7SE512, SAM7SE256 and SAM7SE32 differ in memory sizes and organization. Table 1-1 below summarizes the configurations for the three devices. Table 1-1. Configuration Summary Device Flash Size Flash Organization RAM Size SAM7SE512 512K bytes dual plane 32K bytes SAM7SE256 256K bytes single plane 32K bytes SAM7SE32 32K bytes single plane 8K bytes 3 6222H?ATARM?25-Jan-12 Features ? ? ? ? Incorporates the ARM7TDMI ARM Thumb Processor ? High-performance 32-bit RISC Architecture ? High-density 16-bit Instruction Set ? Leader in MIPS/Watt ? In-circuit Emulation, Debug Communication Channel Support ? EmbeddedICE ? Internal High-speed Flash ? 512 Kbytes, Organized in Two Contiguous Banks of 1024 Pages of 256 Bytes Dual Plane (SAM7SE512) AT91SAM ? 256 Kbytes (SAM7SE256) Organized in One Bank of 1024 Pages of 256 Bytes Single Plane (SAM7SE256) ARM-based ? 32 Kbytes (SAM7SE32) Organized in One Bank of 256 Pages of 128 Bytes Single Plane (SAM7SE32) Flash MCU ? Single Cycle Access at Up to 30 MHz in Worst Case Conditions ? Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed ? Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms ? 10,000 Erase Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, SAM7SE512 Flash Security Bit SAM7SE256 ? Fast Flash Programming Interface for High Volume Production ? 32 Kbytes (SAM7SE512/256) or 8 Kbytes (SAM7SE32) of Internal SAM7SE32 High-speed SRAM, Single-cycle Access at Maximum Speed ? One External Bus Interface (EBI) ? ? Supports SDRAM, Static Memory, Glueless Connection to CompactFlash and ECC-enabled NAND Flash ? Memory Controller (MC) ? Embedded Flash Controller ? Memory Protection Unit ? Abort Status and Misalignment Detection ? Reset Controller (RSTC) ? Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout Detector ? Provides External Reset Signal Shaping and Reset Source Status ? Clock Generator (CKGR) ? Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL ? Power Management Controller (PMC) ? Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode ? Three Programmable External Clock Signals ? Advanced Interrupt Controller (AIC) ? Individually Maskable, Eight-level Priority, Vectored Interrupt Sources ? Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected ? Debug Unit (DBGU) ? Two-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention ? Mode for General Purpose Two-wire UART Serial Communication ? Periodic Interval Timer (PIT) ? 20-bit Programmable Counter plus 12-bit Interval Counter ? Windowed Watchdog (WDT) 6222H?ATARM?25-Jan-12 ? 12-bit key-protected Programmable Counter Features ? ? ? ? Incorporates the ARM7TDMI ARM Thumb Processor ? High-performance 32-bit RISC Architecture ? High-density 16-bit Instruction Set ? Leader in MIPS/Watt ? In-circuit Emulation, Debug Communication Channel Support ? EmbeddedICE ? Internal High-speed Flash ? 512 Kbytes, Organized in Two Contiguous Banks of 1024 Pages of 256 Bytes Dual Plane (SAM7SE512) AT91SAM ? 256 Kbytes (SAM7SE256) Organized in One Bank of 1024 Pages of 256 Bytes Single Plane (SAM7SE256) ARM-based ? 32 Kbytes (SAM7SE32) Organized in One Bank of 256 Pages of 128 Bytes Single Plane (SAM7SE32) Flash MCU ? Single Cycle Access at Up to 30 MHz in Worst Case Conditions ? Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed ? Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms ? 10,000 Erase Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, SAM7SE512 Flash Security Bit SAM7SE256 ? Fast Flash Programming Interface for High Volume Production ? 32 Kbytes (SAM7SE512/256) or 8 Kbytes (SAM7SE32) of Internal SAM7SE32 High-speed SRAM, Single-cycle Access at Maximum Speed ? One External Bus Interface (EBI) ? ? Supports SDRAM, Static Memory, Glueless Connection to CompactFlash and ECC-enabled NAND Flash ? Memory Controller (MC) ? Embedded Flash Controller ? Memory Protection Unit ? Abort Status and Misalignment Detection ? Reset Controller (RSTC) ? Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout Detector ? Provides External Reset Signal Shaping and Reset Source Status ? Clock Generator (CKGR) ? Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL ? Power Management Controller (PMC) ? Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode ? Three Programmable External Clock Signals ? Advanced Interrupt Controller (AIC) ? Individually Maskable, Eight-level Priority, Vectored Interrupt Sources ? Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected ? Debug Unit (DBGU) ? Two-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention ? Mode for General Purpose Two-wire UART Serial Communication ? Periodic Interval Timer (PIT) ? 20-bit Programmable Counter plus 12-bit Interval Counter ? Windowed Watchdog (WDT) 6222H?ATARM?25-Jan-12 ? 12-bit key-protected Programmable Counter? Provides Reset or Interrupt Signals to the System ? Counter May Be Stopped While the Processor is in Debug State or in Idle Mode ? Real-time Timer (RTT) ? 32-bit Free-running Counter with Alarm ? Runs Off the Internal RC Oscillator ? Three Parallel Input/Output Controllers (PIO) ? Eighty-eight Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os ? Input Change Interrupt Capability on Each I/O Line ? Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output ? Schmitt Trigger on All inputs ? Eleven Peripheral DMA Controller (PDC) Channels ? One USB 2.0 Full Speed (12 Mbits per second) Device Port ? On-chip Transceiver, Eight Endpoints, 2688-byte Configurable Integrated FIFOs ? One Synchronous Serial Controller (SSC) ? Independent Clock and Frame Sync Signals for Each Receiver and Transmitter ? I?S Analog Interface Support, Time Division Multiplex Support ? High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer ? Two Universal Synchronous/Asynchronous Receiver Transmitters (USART) ? Infrared Modulation/Demodulation ? Individual Baud Rate Generator, IrDA ? Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support ? Full Modem Line Support on USART1 ? One Master/Slave Serial Peripheral Interfaces (SPI) ? 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects ? One Three-channel 16-bit Timer/Counter (TC) ? Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel ? Double PWM Generation, Capture/Waveform Mode, Up/Down Capability ? One Four-channel 16-bit PWM Controller (PWMC) ? One Two-wire Interface (TWI) ? Master, Multi-Master and Slave Mode Support, All Two-wire Atmel EEPROMs Supported ? General Call Supported in Slave Mode ? One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os ? ? SAM-BA ? Default Boot program ? Interface with SAM-BA Graphic User Interface ? ? IEEE 1149.1 JTAG Boundary Scan on All Digital Pins ? Four High-current Drive I/O lines, Up to 16 mA Each ? Power Supplies ? Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components ? 1.8V or 3,3V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply ? 1.8V VDDCORE Core Power Supply with Brownout Detector ? Fully Static Operation: ? Up to 55 MHz at 1.8V and 85? C Worst Case Conditions ? Up to 48 MHz at 1.65V and 85? C Worst Case Conditions ? Available in a 128-lead LQFP Green Package, or a 144-ball LFBGA RoHS-compliant Package 2 SAM7SE512/256/32 6222H?ATARM?25-Jan-12 Features ? ? ? ? Incorporates the ARM7TDMI ARM Thumb Processor ? High-performance 32-bit RISC Architecture ? High-density 16-bit Instruction Set ? Leader in MIPS/Watt ? In-circuit Emulation, Debug Communication Channel Support ? EmbeddedICE ? Internal High-speed Flash ? 512 Kbytes, Organized in Two Contiguous Banks of 1024 Pages of 256 Bytes Dual Plane (SAM7SE512) AT91SAM ? 256 Kbytes (SAM7SE256) Organized in One Bank of 1024 Pages of 256 Bytes Single Plane (SAM7SE256) ARM-based ? 32 Kbytes (SAM7SE32) Organized in One Bank of 256 Pages of 128 Bytes Single Plane (SAM7SE32) Flash MCU ? Single Cycle Access at Up to 30 MHz in Worst Case Conditions ? Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed ? Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms ? 10,000 Erase Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, SAM7SE512 Flash Security Bit SAM7SE256 ? Fast Flash Programming Interface for High Volume Production ? 32 Kbytes (SAM7SE512/256) or 8 Kbytes (SAM7SE32) of Internal SAM7SE32 High-speed SRAM, Single-cycle Access at Maximum Speed ? One External Bus Interface (EBI) ? ? Supports SDRAM, Static Memory, Glueless Connection to CompactFlash and ECC-enabled NAND Flash ? Memory Controller (MC) ? Embedded Flash Controller ? Memory Protection Unit ? Abort Status and Misalignment Detection ? Reset Controller (RSTC) ? Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout Detector ? Provides External Reset Signal Shaping and Reset Source Status ? Clock Generator (CKGR) ? Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL ? Power Management Controller (PMC) ? Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode ? Three Programmable External Clock Signals ? Advanced Interrupt Controller (AIC) ? Individually Maskable, Eight-level Priority, Vectored Interrupt Sources ? Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected ? Debug Unit (DBGU) ? Two-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention ? Mode for General Purpose Two-wire UART Serial Communication ? Periodic Interval Timer (PIT) ? 20-bit Programmable Counter plus 12-bit Interval Counter ? Windowed Watchdog (WDT) 6222H?ATARM?25-Jan-12 ? 12-bit key-protected Programmable Counter Features ? ? ? ? Incorporates the ARM7TDMI ARM Thumb Processor ? High-performance 32-bit RISC Architecture ? High-density 16-bit Instruction Set ? Leader in MIPS/Watt ? In-circuit Emulation, Debug Communication Channel Support ? EmbeddedICE ? Internal High-speed Flash ? 512 Kbytes, Organized in Two Contiguous Banks of 1024 Pages of 256 Bytes Dual Plane (SAM7SE512) AT91SAM ? 256 Kbytes (SAM7SE256) Organized in One Bank of 1024 Pages of 256 Bytes Single Plane (SAM7SE256) ARM-based ? 32 Kbytes (SAM7SE32) Organized in One Bank of 256 Pages of 128 Bytes Single Plane (SAM7SE32) Flash MCU ? Single Cycle Access at Up to 30 MHz in Worst Case Conditions ? Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed ? Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms ? 10,000 Erase Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, SAM7SE512 Flash Security Bit SAM7SE256 ? Fast Flash Programming Interface for High Volume Production ? 32 Kbytes (SAM7SE512/256) or 8 Kbytes (SAM7SE32) of Internal SAM7SE32 High-speed SRAM, Single-cycle Access at Maximum Speed ? One External Bus Interface (EBI) ? ? Supports SDRAM, Static Memory, Glueless Connection to CompactFlash and ECC-enabled NAND Flash ? Memory Controller (MC) ? Embedded Flash Controller ? Memory Protection Unit ? Abort Status and Misalignment Detection ? Reset Controller (RSTC) ? Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout Detector ? Provides External Reset Signal Shaping and Reset Source Status ? Clock Generator (CKGR) ? Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL ? Power Management Controller (PMC) ? Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode ? Three Programmable External Clock Signals ? Advanced Interrupt Controller (AIC) ? Individually Maskable, Eight-level Priority, Vectored Interrupt Sources ? Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected ? Debug Unit (DBGU) ? Two-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention ? Mode for General Purpose Two-wire UART Serial Communication ? Periodic Interval Timer (PIT) ? 20-bit Programmable Counter plus 12-bit Interval Counter ? Windowed Watchdog (WDT) 6222H?ATARM?25-Jan-12 ? 12-bit key-protected Programmable Counter? Provides Reset or Interrupt Signals to the System ? Counter May Be Stopped While the Processor is in Debug State or in Idle Mode ? Real-time Timer (RTT) ? 32-bit Free-running Counter with Alarm ? Runs Off the Internal RC Oscillator ? Three Parallel Input/Output Controllers (PIO) ? Eighty-eight Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os ? Input Change Interrupt Capability on Each I/O Line ? Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output ? Schmitt Trigger on All inputs ? Eleven Peripheral DMA Controller (PDC) Channels ? One USB 2.0 Full Speed (12 Mbits per second) Device Port ? On-chip Transceiver, Eight Endpoints, 2688-byte Configurable Integrated FIFOs ? One Synchronous Serial Controller (SSC) ? Independent Clock and Frame Sync Signals for Each Receiver and Transmitter ? I?S Analog Interface Support, Time Division Multiplex Support ? High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer ? Two Universal Synchronous/Asynchronous Receiver Transmitters (USART) ? Infrared Modulation/Demodulation ? Individual Baud Rate Generator, IrDA ? Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support ? Full Modem Line Support on USART1 ? One Master/Slave Serial Peripheral Interfaces (SPI) ? 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects ? One Three-channel 16-bit Timer/Counter (TC) ? Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel ? Double PWM Generation, Capture/Waveform Mode, Up/Down Capability ? One Four-channel 16-bit PWM Controller (PWMC) ? One Two-wire Interface (TWI) ? Master, Multi-Master and Slave Mode Support, All Two-wire Atmel EEPROMs Supported ? General Call Supported in Slave Mode ? One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os ? ? SAM-BA ? Default Boot program ? Interface with SAM-BA Graphic User Interface ? ? IEEE 1149.1 JTAG Boundary Scan on All Digital Pins ? Four High-current Drive I/O lines, Up to 16 mA Each ? Power Supplies ? Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components ? 1.8V or 3,3V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply ? 1.8V VDDCORE Core Power Supply with Brownout Detector ? Fully Static Operation: ? Up to 55 MHz at 1.8V and 85? C Worst Case Conditions ? Up to 48 MHz at 1.65V and 85? C Worst Case Conditions ? Available in a 128-lead LQFP Green Package, or a 144-ball LFBGA RoHS-compliant Package 2 SAM7SE512/256/32 6222H?ATARM?25-Jan-12 SAM7SE512/256/32 1. Description Atmel's SAM7SE Series is a member of its Smart ARM Microcontroller family based on the 32- ? bit ARM7 RISC processor and high-speed Flash memory. ? SAM7SE512 features a 512-Kbyte high-speed Flash and a 32 Kbyte SRAM. ? SAM7SE256 features a 256-Kbyte high-speed Flash and a 32 Kbyte SRAM. ? SAM7SE32 features a 32-Kbyte high-speed Flash and an 8 Kbyte SRAM. It also embeds a large set of peripherals, including a USB 2.0 device, an External Bus Interface (EBI), and a complete set of system functions minimizing the number of external components. The EBI incorporates controllers for synchronous DRAM (SDRAM) and Static memories and features specific circuitry facilitating the interface for NAND Flash, SmartMedia and CompactFlash. The device is an ideal migration path for 8/16-bit microcontroller users looking for additional per- formance, extended memory and higher levels of system integration. The embedded Flash memory can be programmed in-system via the JTAG-ICE interface or via a parallel interface on a production programmer prior to mounting. Built-in lock bits and a secu- rity bit protect the firmware from accidental overwrite and preserve its confidentiality. The SAM7SE Series system controller includes a reset controller capable of managing the power-on sequence of the microcontroller and the complete system. Correct device operation can be monitored by a built-in brownout detector and a watchdog running off an integrated RC oscillator. By combining the ARM7TDMI processor with on-chip Flash and SRAM, and a wide range of peripheral functions, including USART, SPI, External Bus Interface, Timer Counter, RTT and Analog-to-Digital Converters on a monolithic chip, the SAM7SE512/256/32 is a powerful device that provides a flexible, cost-effective solution to many embedded control applications. 1.1 Configuration Summary of the SAM7SE512, SAM7SE256 and SAM7SE32 The SAM7SE512, SAM7SE256 and SAM7SE32 differ in memory sizes and organization. Table 1-1 below summarizes the configurations for the three devices. Table 1-1. Configuration Summary Device Flash Size Flash Organization RAM Size SAM7SE512 512K bytes dual plane 32K bytes SAM7SE256 256K bytes single plane 32K bytes SAM7SE32 32K bytes single plane 8K bytes 3 6222H?ATARM?25-Jan-12

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