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MAX5316GTG+

MAX5316GTG+ electronic component of Analog Devices

Datasheet
Maxim Integrated Digital to Analog Converters - DAC 16-bit V Out SPI DAC wDigi Gain & Offset

Manufacturer: Analog Devices
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1: USD 26.0442 ea
Line Total: USD 26.0442

0 - Global Stock
MOQ: 1  Multiples: 1
Pack Size: 1
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0 - Global Stock


Ships to you between Thu. 04 Apr to Wed. 10 Apr

MOQ : 360
Multiples : 360

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MAX5316GTG+
Analog Devices

360 : USD 33.7797

0 - Global Stock


Ships to you between Wed. 10 Apr to Fri. 12 Apr

MOQ : 1
Multiples : 1

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MAX5316GTG+
Analog Devices

1 : USD 26.0442
10 : USD 24.0282
25 : USD 22.0621
120 : USD 19.7118
300 : USD 19.4573
540 : USD 18.8031

     
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19-6166 Rev 0 1/12 EVALUATION KIT AVAILABLE MAX5316 16-Bit, 1 LSB Accuracy Voltage Output DAC with SPI Interface General Description Benefits and Features The MAX5316 is a high-accuracy, 16-bit, serial SPI input, S Ideal for ATE and High-Precision Instruments buffered voltage output digital-to-analog converter (DAC) INL Accuracy Guaranteed with 1 LSB (Max) in a 4mm x 5mm, 24-lead TQFN package. The device Over Temperature features Q1 LSB INL (max) accuracy and a Q0.25 LSB S Fast Settling Time (3s) with 10kI 100pF Load DNL (typ) accuracy over the temperature range of -40NC S Safe Power-Up-Reset to Zero or Midscale DAC to +105NC. Output (Pin-Selectable) The DAC voltage output is buffered with a fast set- Predetermined Output Device State in Power-Up tling time of 3Fs and a low offset and gain drift of and Reset in System Design Q0.6ppm/NC of FSR (typ). The force-sense output (OUT) S Negative Supply (AVSS) Option Allows Full INL maintains accuracy while driving loads with long lead and DNL Performance to 0V lengths. A separate AVSS supply pin is provided to per- S SPI Interface Compatible with 1.7V to 5.5V mit the output amplifier to go to 0V (GND) to maintain full linearity performance near ground. Logic At power-up, the device resets its outputs to zero or S High Integration Reduces Development Time and PCB Area midscale. Buffered Voltage Output Directly Drives The wide 2.7V to 5.5V supply voltage range and inte- 2kI Load Rail-to-Rail grated low-drift, low-noise reference buffer make for ease Integrated Reference Buffer of use. The MAX5316 features a 50MHz 3-wire SPI inter- No External Amplifiers Required 2 face. For an I C interface, use the MAX5317. S Small 4mm x 5mm, 24-Pin TQFN Package The MAX5316 is available in a 24-lead TQFN-EP pack- age and operates over the -40NC to +105NC temperature range. Functional Diagram Applications Test and Measurement V REF AVDD2 AVDD1 DDIO 22 16 19 12 Automatic Test Equipment 15 REFO Gain and Offset Adjustment BUFFER Data-Acquisition Systems MAX5316 LDAC 3 Process Control and Servo Loops 7.8kI CS 7 Programmable Voltage and Current Sources SCLK 6 INPUT/ 7.8kI 7.8kI DIN 5 16-BIT 14 RFB SPI SPI DAC Automatic Calibration DAC INTERFACE DOUT 4 REGISTER Communication Systems READY 24 Medical Equipment BUSY 2 13 OUT OUTPUT BUFFER RST 23 CONTROL POWER-ON M/Z 1 LOGIC RESET 7.8kI TC/SB 8 SHUTDOWN PD 9 Ordering Information appears at end of data sheet. 21 20 11 17 18 10 DGND BYPASS AGND AGND S AGND F AVSS QSPI is a trademark of Motorola, Inc. MICROWIRE is a registered trademark of Texas Instrument Incorporated. For related parts and recommended products to use with this part, refer to www.maxim-ic.com/MAX5316.related. 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629- 4642, or visit Maxims website at www.maxim-ic.com.MAX5316 16-Bit, 1 LSB Accuracy Voltage Output DAC with SPI Interface ABSOLUTE MAXIMUM RATINGS AGND to DGND ...................................................-0.3V to +0.3V REF to AGND ..............................................-0.3V to the lower of AGND F, AGND S to AGND ...............................-0.3V to +0.3V V and +6V AVDD SCLK, DIN, CS, BUSY, LDAC, READY, AGND F, AGND S to DGND ...............................-0.3V to +0.3V M/Z, TC/SB, RST, PD, DOUT to DGND .......-0.3V to the lower of AVDD to AGND .....................................................-0.3V to +6V (V + 0.3V) and +6V AVDD to REF .........................................................-0.3V to +6V DDIO Continuous Power Dissipation (T = +70NC) AVSS to AGND ........................................................-2V to +0.3V A TQFN (derate 28.6mW/NC above +70NC) ...............2285.7mW V to DGND .......................................................-0.3V to +6V DDIO Operating Temperature Range ........................ -40NC to +105NC BYPASS to DGND .......................................-0.3V to the lower of Maximum Junction Temperature .....................................+150NC (V or V + 0.3V) and +6V AVDD DDIO Storage Temperature Range ............................ -65NC to +150NC OUT, REFO, RFB to AGND .........................-0.3V to the lower of Lead Temperature (soldering, 10s) ................................+300NC (V + 0.3V) and +6V AVDD Soldering Temperature (reflow) ......................................+260NC Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional opera- tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PACKAGE THERMAL CHARACTERISTICS (Note 1) TQFN Junction-to-Case Thermal Resistance (q ) ..............1.8C/W JA Junction-to-Ambient Thermal Resistance (q ) ..........35C/W JA Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four- layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. ELECTRICAL CHARACTERISTICS (V = V = 4.5V to 5.5V, V = -1.25V, V = V = V = V = 0V, V = 4.096V, TC/SB = PD = LDAC AVDD DDIO AVSS AGND DGND AGND F AGND S REF = M/Z = DGND, RST = V , C = 100pF, C = 100pF, R = 10k, C = 1F, T = -40C to +105C, unless otherwise DDIO REFO L L BYPASS A noted. Typical values are at T = +25C.) (Note 2) A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE Resolution N 16 Bits DIN = 0x0000 to 0xFFFF (binary mode), DIN = 0x8000 to 0x7FFF (twos complement mode) Integral Nonlinearity (Note 3) INL -1 Q0.25 +1 LSB DIN = 0x0640 to 0xFFFF (binary mode), DIN = 0x8280 to 0x7FFF (twos complement mode), V = 0V AVSS Differential Nonlinearity (Note 3) DNL -1 Q0.25 +1 LSB DIN = 0, T = +25NC -19 Q1 +19 A Zero Code Error OE LSB DIN = 0, T = -40NC to +105NC Q6 A Zero Code Error Drift DIN = 0 -2.5 Q0.4 +2.5 ppm/NC T = +25NC -4 Q0.25 +4 A Gain Error GE LSB T = -40NC to +105NC Q3 A Gain Error Temperature ppm/NC TCGE -2.75 Q0.6 +2.75 Coefficient of FSR 2

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Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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