Product Information

LFXP2-17E-5QN208C

LFXP2-17E-5QN208C electronic component of Lattice

Datasheet
FPGA - Field Programmable Gate Array 17KLUTs 201 I/O Inst -on DSP 1.2V -5 Spd

Manufacturer: Lattice
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 79.005 ea
Line Total: USD 79.005

79 - Global Stock
Ships to you between
Thu. 11 Apr to Mon. 15 Apr
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
79 - Global Stock


Ships to you between Thu. 11 Apr to Mon. 15 Apr

MOQ : 1
Multiples : 1
1 : USD 79.005
24 : USD 68.8275
120 : USD 66.2285

     
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Product Category
RoHS - XON
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Product
Series
Number of Logic Elements
Number of I/Os
Operating Supply Voltage
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
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Packaging
Brand
Distributed Ram
Embedded Block Ram - Ebr
Number Of Logic Array Blocks - Labs
Factory Pack Quantity :
Total Memory
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LatticeXP2 Family Data Sheet DS1009 Version 2.2, September 2014LatticeXP2 Family Data Sheet Introduction February 2012 Data Sheet DS1009 Flexible I/O Buffer Features sysIO buffer supports: flexiFLASH Architecture LVCMOS 33/25/18/15/12 LVTTL Instant-on SSTL 33/25/18 class I, II Infinitely reconfigurable HSTL15 class I HSTL18 class I, II Single chip PCI FlashBAK technology LVDS, Bus-LVDS, MLVDS, LVPECL, RSDS Serial TAG memory Pre-engineered Source Synchronous Design security Interfaces Live Update Technology DDR / DDR2 interfaces up to 200 MHz TransFR technology 7:1 LVDS interfaces support display applications Secure updates with 128 bit AES encryption XGMII Dual-boot with external SPI Density And Package Options sysDSP Block 5k to 40k LUT4s, 86 to 540 I/Os Three to eight blocks for high performance csBGA, TQFP, PQFP, ftBGA and fpBGA packages Multiply and Accumulate Density migration supported 12 to 32 18x18 multipliers Flexible Device Configuration Each block supports one 36x36 multiplier or four SPI (master and slave) Boot Flash Interface 18x18 or eight 9x9 multipliers Dual Boot Image supported Embedded and Distributed Memory Soft Error Detect (SED) macro embedded Up to 885 Kbits sysMEM EBR System Level Support Up to 83 Kbits Distributed RAM IEEE 1149.1 and IEEE 1532 Compliant sysCLOCK PLLs On-chip oscillator for initialization & general use Up to four analog PLLs per device Devices operate with 1.2V power supply Clock multiply, divide and phase shifting Table 1-1. LatticeXP2 Family Selection Guide Device XP2-5XP2-8XP2-17XP2-30XP2-40 LUTs (K) 5 8 172940 Distributed RAM (KBits) 1018355683 EBR SRAM (KBits) 166 221 276 387 885 EBR SRAM Blocks 9 12 15 21 48 sysDSP Blocks 3 4 5 7 8 18 x 18 Multipliers 1216202832 V Voltage 1.2 1.2 1.2 1.2 1.2 CC GPLL 22 444 Max Available I/O 172 201 358 472 540 Packages and I/O Combinations 132-Ball csBGA (8 x 8 mm) 86 86 144-Pin TQFP (20 x 20 mm) 100 100 208-Pin PQFP (28 x 28 mm) 146 146 146 256-Ball ftBGA (17 x17 mm) 172 201 201 201 484-Ball fpBGA (23 x 23 mm) 358 363 363 672-Ball fpBGA (27 x 27 mm) 472 540 2012 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. www.latticesemi.com 1-1 DS1009 Introduction 01.4

Tariff Desc

8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Monolithic integrated circuits:
LA4
LAT
LATTICE SEMI
Lattice Semiconductor
Lattice Semiconductor Corporation
Vantis

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