PEX9700 Series Switch Chips Product Brief Managed PCI Express Switches Based on ExpressFabric Technology Converge Servers and IO controllers with PCIe Create cost-effective high-availability hyperscale systems by enabling communication between in-rack hosts and endpoints using PCIe Simplify connectivity while providing the highest PCIe switching performance available for data center servers, storage, and networks Reduce latency, system complexity, and power consumption by up to 50% in data-intensive environments Take advantage of industry-first features for most demanding hyper- converged, NVMe and rack scale systems Broadcom PEX9700 switches allow customers to build high performance, low General Features latency, scalable, cost-effective PCI Express-based fabrics. The switches enable I/O sharing with standard SR-IOV or multifunction capability, allowing multiple State-of-the-art switch fabric hosts or Nodes to reside on a single PCIe-based network. Hosts communicate Sharing I/Os among multiple through Tunneled Window Connection (TWC), a special low latency host-to- hosts host communication capability for short packets. Low latency TWC Any port can be a host port or Shared I/O Using Standards Downstream (device) Port PEX9700 switches allow the Virtual Functions (VFs) of SRIOV endpoints Works with standard PCIe end- (such as an Broadcom MegaRAID SAS controller) to be shared and points and hosts and software, assigned to multiple hosts concurrently. Each host can enumerate its as well as with existing application assigned functions using standard BIOS and OS software and use them with software unmodified vendor-supplied drivers. The use of standard system software minimizes software support costs. MSI-X support Allows flexible fabric topologies Software-Defined Fabric The switches are built on a hybrid hardware/software platform that offers high Key Advantages configurability and flexibility in regards to the number of hosts, end-points, PCI Express Switches and PCIe slots. The critical pathways have direct hardware support, enabling the fabric to offer non-blocking, line speed performance with features such 12 to 97 Lanes with Integrated as I/O sharing. The solution is completed by management processor that on-chip SerDes communicates with platform management via API and/or CLI. The solution 5 t o 25 Independent ports offers an innovative approach to setup and control, making use of an off- Designate any Port as the chip management CPU (mCPU) to initialize the PEX9700 switch, configure Upstream Port the routing tables, handle errors, Hot-Plug events, and enable the solution to extend the capabilities without modifying the system software. Low-power SerDes (under 90 mW per Lane) Tunneled Window Connection (TWC) Device-Specific Relaxed Ordering Port configuration TWC allows short messages to be sent from one host to another in a very low latency manner, and without the overhead associated with DMA. Dedica ted management port for mCPU PEX9700 Series Switch ChipsProduct Brief Downstream Port Con- HPC Clusters tainment (DPC/eDPC) HPC clusters are made up of high- Key Advantages (Continued) performance processing elements Most servers have difficulty handling that communicate through high x4, x8, or x16, depending on serious errors, especially when a bandwidth, low latency pathways Port configuration x4 can PCIe end-point disappears from in order to execute applications the system. DPC/eDPC allows a down-train to x1 and x2 width such as medical imaging, financial downstream link to be disabled Configurable through serial trading, data warehousing, etc. after an uncorrectable error, making EEPROM, I2C, SMBus, and/or PEX9700 switches can be used recovery possible in a controlled and Host port in switch fabric applications for robust manner. HPC clustering. The processing Standards Compliant subsystems can be connected to the PCI Express Base Specification, Flexible Topologies PCIe fabric while running the same r3.1 (backward compatible w/ application software. PCIe switch PEX9700 switches eliminate the PCIe r2.0, & r1.0a/1.1) based clustering eliminates expensive topology restrictions of PCIe. The PCI Power Management Spec, protocol bridging devices resulting in switch allows other topologies such lower cost and power. And clustering r1.2 as mesh, I/O Expansion Box with systems can be built with I/O sharing Multiple Hosts, and many others. High Performance as an additional native capability And it does this while allowing the Full line rate on all ports when needed. components to remain architecturally Cut- Thru packet latency of less and software compatible with than 150ns (x16 to x16) standard PCIe. Software Development 2KB Max Payload Size Kit (SDK) Improved SSC Isolation Multicast through DMA The SDK for the PEX9700 series Quality of Service (QoS) The switches offer several includes drivers, source code and mechanisms for supporting multi- GUI interfaces to aid in configuring 8 Traffic Classes (TC) supported clock domains that include spread and debugging. Both the Reliability, Availability, spectrum clocking eliminating performancePAK and visionPAK Serviceability the need to pass a common clock are exclusive to Avago and are visionPAK across a backplane. In addition to supported by its RDK and SDK, which the standard Avago approach to the are the industrys most advanced performance PAK problem, a new PCI-SIG approach hardware-and software development DPC/eDPC Support called SRIS (Separate Refclk kits. Read Tracking for surprise Independent SSC Architecture) is removal now available. performancePAK All ports Hot-Plug capable thru The performancePAK is a suite of I2C SSC isolation on all ports Applications unique and innovative performance SRIS support Products based on ExpressFabric features that allows Avago Gen 3 technology can help deliver an ECRC and Poison bit support switches to be the highest performing outstanding solution for designing switches in the market today. Port Status bits and GPIO a heterogeneous system with a available requirement for a flexible mix of visionPAK processors, storage elements, and communication devices. The visionPAK is a debug diagnostics suite of integrated hardware and software instruments that allows users to help bring their systems to market faster. PEX9700 Series Switch Chips