SiT1579 2 1.2mm Power, Low-Jitter, 1Hz 2.5 MHz Oscillator Features Applications 1 Hz to 2.5 MHz 50 ppm all-inclusive frequency stability Health and wellness monitors Factory programmable output frequency 2 Smart pens Worlds smallest Oscillator Footprint: 1.2 mm ULP input devices 1.5 x 0.8 mm CSP Proprietary wireless No external bypass cap required Sensor interface Improved stability reduces system power with fewer network timekeeping updates Ultra-low power: 6 A (100 kHz) Supply voltage range: 1.62 V to 3.63 V Operating temperature ranges: -20C to +70C, -40C to +85C Pb-free, RoHS and REACH compliant Electrical Characteristics Table 1. Electrical Characteristics Conditions: Min/Max limits are over temperature, V = 1.8V 10%, unless otherwise stated. Typicals are at 25C and V = 1.8V. DD DD Parameter Symbol Min. Typ. Max. Unit Condition Frequency and Stability Output Frequency FOUT 1 2.5 M Hz Initial Frequency Tolerance F tol -10 10 ppm Includes 2x reflow All inclusive of over temperature, referenced to nominal Frequency Stability F stab -50 50 ppm frequency at 25C, inclusive of V , aging, and load DD Jitter Performance F > 1 kHz. Integration bandwidth = 100 Hz to F /2. OUT OUT ns Integrated Phase Jitter IPJ 2 3.5 Inclusive of 50 mV peak-to-peak sinusoidal noise on V . Noise RMS DD frequency 100 Hz to 20 MHz Cycles = 10,000, f = 100kHz. Per JEDEC standard 65B, tested at RMS Period Jitter PJ 2.2 4.5 ns RMS 100kHz. See performance plot for other frequencies. Supply Voltage and Current Consumption Operating Supply Voltage V 1.62 3.63 V DD 3.65 5 F = 1 Hz OUT 4.5 5.5 F = 33 kHz OUT I DD No Load Supply Current 6 7 F = 100 kHz OUT A 13 16 F = 1 MHz OUT 33 40 F = 2 MHz OUT Measured when supply reaches 90% of final V to the first output DD 150 300 pulse and within specified min/max frequency limit. 10 Hz < F 200 Hz, to first output pulse. OUT 300 + 300 + Measured when supply reaches 90% of final V to the first output DD Start-up Time at Power-up t start ms 2.0 cycles 2.5 cycles pulse and within specified min/max frequency limit. 1 Hz F 10 Hz, to first output pulse. OUT 500 + Measured when supply reaches 90% of final V to the first output DD 3 cycles pulse and within specified min/max frequency limit. Operating Temperature Range -20 70 C C ordering code Operating Temperature Range Op Temp -40 85 C I ordering code LVCMOS Output Output Rise/Fall Time t , t 9 20 ns 20-80%, 15 pF load, V = 1.8V +/-10% R F DD Output Clock Duty Cycle DC 45 55 % Output Voltage High VOH 90% V I = -50 A, 15 pF load DD OH Output Voltage Low I = 50 A, 15 pF load VOL 10% V OL DD Note: 1. Includes initial tolerance, over temp stability, 2x reflow, V range, board-level underfill, and 20% load variation. Tested with Agilent 53132A frequency DD counter. Measured with 100 ms gate time for accurate frequency measurement. Rev. 1.1 January 22, 2018 www.sitime.com 2 SiT1579 1.2mm Power, Low-Jitter, 1Hz 2.5 MHz Oscillator Table 2. Pin Configuration Top View Pin Symbol I/O Functionality No Connect. Leave floating. Pin 1 is for internal testing and is designed 1 NC Internal Test to be left floating. NC 1 4 GND 2 CLK Out OUT Oscillator clock output. Operates from nominal supply voltages between 1.8V and 3.3V. Under normal operating conditions, V does not require external DD 3 V Power Supply DD bypass/decoupling capacitor(s). CLK Out 3 Vdd 2 SiT1579 includes on-chip V filtering. DD Power Supply 4 GND Connect to ground. Ground Figure 1. Pin Assignment Table 3. Absolute Maximum Ratings Attempted operation outside the absolute maximum ratings may cause permanent damage to the part. Actual performance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings. Parameters Test Conditions Value Unit Continuous Power Supply Voltage Range (V ) -0.5 to 4.0 V DD Continuous Maximum Operating Temperature Range 105 C Short Duration Maximum Operating Temperature Range 30 minutes 125 C Human Body Model (HBM) ESD Protection JESD22-A114 2000 V Charge-Device Model (CDM) ESD Protection JESD22-C101 750 V Machine Model (MM) ESD Protection JESD22-A115 300 V Latch-up Tolerance JESD78 Compliant Mechanical Shock Resistance Mil 883, Method 2002 20,000 g Mechanical Vibration Resistance Mil 883, Method 2007 70 g 1508 CSP Junction Temperature 150 C Storage Temperature -65 to 150 C System Block Diagram GND Temp Temp-to-Digital NVM Control Prog Prog Driver CLK Out NC Figure 2. SiT1579 Block Diagram Rev. 1.1 Page 2 of 8 www.sitime.com