SX1301IMLTRT

SX1301 WIRELESS & SENSING PRODUCTS Datasheet SX1301 I/Q DDR - LoRa DDR - LoRa DDR - LoRa Tx/Rx I/Q 8x LoRa I/Q (Tx/Rx) I/Q (G)FSK MCU SPI Packet timestamp (GPS) (G)FSK/LoRa handler General Description Key Product Features The SX1301 digital baseband chip is a massive Up to -142 dBm sensitivity with SX1257 digital signal processing engine specifically or SX1255 Tx/Rx front-end designed to offer breakthrough gateway -139.5 dBm with included ref capabilities in the ISM bands worldwide. It design integrates the LoRa concentrator IP. 70 dB CW interferer rejection at 1 MHz offset The LoRa concentrator is a multi-channel high Able to operate with negative SNR performance transmitter/receiver designed to CCR up to 9 dB simultaneously receive several LoRa packets using random spreading factors on random Emulates 49x LoRa demodulators and 1x channels. Its goal is to enable robust (G)FSK demodulator connection between a central wireless data concentrator and a massive amount of Dual digital Tx & Rx radio front-end wireless end-points spread over a very wide interfaces range of distances. 10 programmable parallel demodulation The SX1301 is targeted at smart metering paths fixed networks and Internet of Things Dynamic data-rate adaptation (ADR) applications. True antenna diversity or simultaneous dual-band operation Ordering Information Applications Part Number Conditioning SX1301IMLTRC Tape & Reel Smart Metering 3,000 parts per reel Security Sensors Network SX1301IMLTRT Tape & Reel Agricultural Monitoring 500 parts per reel Internet of Things (IoT) Pb-free, Halogen free, RoHS/WEEE compliant product V2.4 June 2017 www.semtech.com 1 Packet handler ControlSX1301 WIRELESS & SENSING PRODUCTS Datasheet Contents 1 PIN CONFIGURATION .................................................................................................................. 4 1.1 Pins Placement and Circuit Marking ........................................................................................... 4 1.2 Pins Description .......................................................................................................................... 5 2 ELECTRICAL CHARACTERISTICS ................................................................................................... 7 2.1 Absolute Maximum Ratings ........................................................................................................ 7 2.2 Constraints on External ............................................................................................................... 7 2.3 Operating Conditions .................................................................................................................. 7 2.4 Electrical Specifications ............................................................................................................... 8 2.5 Timing Specifications .................................................................................................................. 8 3 CIRCUIT OPERATION ................................................................................................................... 9 3.1 General Presentation .................................................................................................................. 9 3.2 Power-on ..................................................................................................................................... 9 3.2.1 Power-up Sequence ................................................................................................................ 9 3.2.2 Setting the Circuit is Low-power Mode .................................................................................. 9 3.3 Clocking ..................................................................................................................................... 10 3.4 SPI Interface .............................................................................................................................. 11 3.5 Rx I/Q Interface ......................................................................................................................... 12 3.5.1 I/Q Generated on Clock Rising Edge ..................................................................................... 12 3.5.2 I/Q Generated on Clock Falling Edge .................................................................................... 12 3.6 RX Mode Block Diagram, Reception Paths Characteristics ....................................................... 13 3.6.1 Block Diagram ....................................................................................................................... 13 3.6.2 Reception Paths Characteristics ............................................................................................ 14 3.7 Packet Engine and Data Buffers ................................................................................................ 15 3.7.1 Receiver Packet Engine ......................................................................................................... 15 3.7.2 Transmitter Packet Engine .................................................................................................... 17 3.8 Receiver IF Frequencies Configuration ..................................................................................... 19 3.8.1 Configuration Using 2 x SX1257 Radios ................................................................................ 19 3.8.2 Two SX1255: 433 MHz Band ................................................................................................. 21 3.8.3 One SX1257 and one SX1255 ................................................................................................ 21 3.9 Connection to RF Front-end ...................................................................................................... 22 3.9.1 Connection to Semtech SX1255 or SX1257 Components ..................................................... 22 3.9.2 SX1301 RX Operation using a Third Party RF Front-end ....................................................... 22 3.9.3 Radio Calibration ................................................................................................................... 24 3.9.4 SX1301 Connection to RF front-end for TX Operation .......................................................... 24 3.10 Reference Application ............................................................................................................... 26 3.11 SX1301 Sensitivity Performance in Reference Application ....................................................... 27 3.12 SX1301 Sensitivity vs Data Rate in LoRa Mode ......................................................................... 28 3.12.1 125kHz Mode: IF8, IF 0 to 7 Paths ....................................................................................... 28 3.12.2 250 & 500 kHz Mode: IF8 only .............................................................................................. 29 3.13 SX1301 Interference Rejection ................................................................................................. 29 3.14 Hardware Abstraction Layer (HAL) ........................................................................................... 31 3.14.1 Introduction .......................................................................................................................... 31 3.14.2 Abstraction Presented to the Gateway Host ........................................................................ 32 4 EXTERNAL COMPONENTS ......................................................................................................... 33 5 PCB LAYOUT CONSIDERATIONS ................................................................................................ 34 V2.4 June 2017 www.semtech.com 2