NOT RECOMMENDED FOR NEW DESIGNS RECOMMENDED REPLACEMENT PART ZL6105 DATASHEET ZL6100 FN6876 Rev 3.00 Adaptive Digital DC/DC Controller with Drivers and Current Sharing August 29, 2012 ZL6100 is a digital power controller with integrated MOSFET Features drivers. Current sharing allows multiple devices to be Power Conversion connected in parallel to source loads with very high current Efficient Synchronous Buck Controller demands. Adaptive performance optimization algorithms improve power conversion efficiency across the entire load Adaptive Light Load Efficiency Optimization range. Zilker Labs Digital-DC technology enables a blend 3V to 14V Input Range of power conversion performance and power management 0.54V to 5.5V Output Range (with Margin) features. 1% Output Voltage Accuracy The ZL6100 is designed to be a flexible building block for DC Internal 3A MOSFET Drivers power and can be easily adapted to designs ranging from a single-phase power supply operating from a 3.3V input to a Fast Load Transient Response multi-phase supply operating from a 12V input. The ZL6100 Current Sharing and Phase Interleaving eliminates the need for complicated power supply managers Snapshot Parameter Capture as well as numerous external discrete components. 36 Ld 6mmx6mm QFN Package All operating features can be configured by simple Pb-Free (RoHS Compliant) pin-strap/resistor selection or through the SMBus serial interface. The ZL6100 uses the PMBus protocol for Power Management communication with a host controller and the Digital-DC bus Digital Soft-start/stop for communication between other Zilker Labs devices. Precision Delay and Ramp-up Ordering Information Power-Good/Enable PART TEMP. Voltage Tracking, Sequencing and Margining NUMBER PART RANGE PACKAGE PKG. Voltage/Current/Temperature Monitoring (Notes 1, 2, 3) MARKING (C) (Pb-Free) DWG. 2 I C/SMBus Interface (PMBus Compatible) ZL6100ALAF 6100 -40 to +85 36 Ld QFN L36.6x6C Output Voltage and Current Protection (Note 4) Internal Non-volatile Memory (NVM) ZL6100ALBF 6100 -40 to +85 36 Ld QFN L36.6x6C Applications NOTES: Servers/Storage Equipment 1. Add T* suffix for tape and reel. Please refer to TB347 for details on reel specifications. Telecom/Datacom Equipment 2. These Intersil Pb-free plastic packaged products employ special Power Supplies (Memory, DSP, ASIC, FPGA) Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which EN PG CFG UVLO V25 VR VDD DLY FC ILIM is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb- free requirements of IPC/JEDEC J STD-020. V LDO SS 3. For Moisture Sensitivity Level (MSL), please see device VTRK POWER information page for ZL6100. For more information on MANAGEMENT MGN MSL, please see Technical Brief TB363. BST SYNC GH DDC 4. Only for customers that do not want to order new DRIVER SW firmware. GL NON- VSEN+ PWM VOLATILE VSEN- CONTROLLER MEMORY CURRENT ISENA SENSE ISENB SCL TEMP MONITOR 2 I C SDA SENSOR ADC SALRT SA XTEMP PGND SGND DGND FIGURE 1. BLOCK DIAGRAM FN6876 Rev 3.00 Page 1 of 34 August 29, 2012ZL6100 Table of Contents Absolute Maximum Ratings . 3 Thermal Information . 3 Recommended Operating Conditions 3 Electrical Specifications . 3 Pinout . 6 Pin Descriptions . 6 Typical Application Circuit 8 ZL6100 Overview 8 Digital-DC Architecture .8 Power Conversion Overview . 9 Power Management Overview . 10 Multi-mode Pins . 10 Power Conversion Functional Description 11 Internal Bias Regulators and Input Supply Connections . 11 High-side Driver Boost Circuit 11 Output Voltage Selection . 11 Start-up Procedure . 13 Soft-start Delay and Ramp Times 14 Power-Good 15 Switching Frequency and PLL . 15 Power Train Component Selection . 16 Current Limit Threshold Selection 19 Loop Compensation . 22 Adaptive Compensation 22 Non-linear Response (NLR) Settings 23 Efficiency Optimized Driver Dead-time Control . 23 Adaptive Diode Emulation 23 Adaptive Frequency Control . 23 Power Management Functional Description . 24 Input Undervoltage Lockout . 24 Output Overvoltage Protection . 24 Output Pre-Bias Protection 24 Output Overcurrent Protection . 25 Thermal Overload Protection 25 Voltage Tracking 26 Voltage Margining . 26 I2C/SMBus Communications 27 I2C/SMBus Device Address Selection . 27 Digital-DC Bus 28 Phase Spreading 28 Output Sequencing 28 Fault Spreading . 29 Temperature Monitoring Using the XTEMP Pin . 29 Active Current Sharing . 29 Phase Adding/Dropping 30 2 Monitoring via I C/SMBus 31 Snapshot Parameter Capture 31 Non-Volatile Memory and Device Security Features . 32 Related Tools and Documentation 32 Related Documentation . 32 Revision History 33 Package Outline Drawing . 34 FN6876 Rev 3.00 Page 2 of 34 August 29, 2012