DATASHEET ICM7245 FN8587 Rev 0.00 8-Character, 16-Segment, Microprocessor Compatible, LED Display Decoder October 29, 2013 Driver The ICM7245 is an 8-character, alphanumeric display driver Features and controller which provides all the circuitry required to Single supply +3.3V operation interface a microprocessor or digital system to a 16-segment display with internal pull-up resistors. It is primarily intended 16-Segment fonts with decimal point for use in microprocessor systems, where it minimizes Up to 8 character display driver hardware and software overhead. Incorporated on-chip are a Has internal pull-up resistors of 136 Typical 64-character ASClI decoder, 8x6 memory, high power character and segment drivers, and the multiplex scan Microprocessor compatible circuitry. Directly drives LED common cathode displays 6-bit ASCll data to be displayed is written into the memory Cascadable without additional hardware directly from the microprocessor data bus. Data location Standby feature turns display off puts chip in low power depends upon the selection of either Sequential (MODE = 1) or mode Random access mode (MODE = 0). In the Sequential Access mode the first entry is stored in the lowest location and Sequential entry or random entry of data into display displayed in the left-most character position. Each Character and segment drivers, All MUX scan circuitry, 8x6 subsequent entry is automatically stored in the next higher static memory and 64-character ASCll font generator location and displayed to the immediate right of the previous included on-chip entry. A DISPlay FULL signal is provided after 8 entries this Pb-free (RoHS compliant) signal can be used for cascading devices together. A CLR pin is provided to clear the memory and reset the location counter. The Random Access mode allows the processor to select the memory address and display digit for each input word. The character multiplex scan runs whenever data is not being entered. It scans the memory and CHARacter drivers, and ensures that the decoding from memory to display is done in the proper sequence. Intercharacter blanking is provided to avoid display ghosting. Ordering Information PART NUMBER TEMP. RANGE PACKAGE (Note 2) PART MARKING (C) (Pb-Free) PKG. DWG. ICM7245AIM44Z ICM7245 AIM44Z -25C to +85C 44 Ld MQFP Q44.10x10 ICM7245AIM44ZT (Note 1) ICM7245 AIM44Z -25C to +85C 44 Ld MQFP (Tape and Reel) Q44.10x10 NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ICM7245. For more information on MSL, please see tech brief TB363. FN8587 Rev 0.00 Page 1 of 13 October 29, 2013ICM7245 Pin Configuration ICM7245 (16-SEGMENT CHARACTER) (44 LD MQFP) TOP VIEW 44 43 42 41 40 39 38 37 36 35 34 SEG d1 SEG d2 1 33 SEG a1 2 DP 32 SEG a2 3 SEG h 31 D0 4 SEG j 30 MODE 5 29 D1 D2 6 28 A /SEN 0 D3 7 27 A /CLR 1 D4 8 26 A /DISP FULL 2 D5 9 25 OSC/OFF CS 10 24 CHAR1 11 23 NC NC 12 13 14 15 16 17 18 19 20 21 22 Pin Descriptions SIGNAL PIN FUNCTION D0 - D5 4 thru 9 6-Bit ASCll Data input pins (active high). CS 10 Chip Select from P address decoder, etc. WR 13 WRite pulse input pin (active low). For an active high write pulse, CS can be used. MODE 29 Selects data entry MODE. High selects Sequential Access (SA) mode where first entry is displayed in leftmost character and subsequent entries appear to the right. Low selects Random Access (RA) mode where data is displayed on the character addressed via A0 thru A2 Address pins. A0/SEN 28 In RA mode it is the LSB of the character Address. In SA mode it is used for cascading devices for displays of more than 8 characters (active high enables device controller). A1/CLR 27 In RA mode this is the second bit of the address. In SA mode, a low input will CLeaR the Serial Address Counter, the Data Memory and the display. A2/DISP FULL 26 In RA mode this is the MSB of the Address. In SA mode, the output goes high after 8 entries, indicating DISPlay FULL. OSC/OFF 25 OSCillator input pin. Adding capacitance to V will lower the internal oscillator frequency. An DD external oscillator can be applied to this pin. A low at this input sets the device into a (shutdown) mode, shutting OFF the display and oscillator but retaining data stored in memory. SEG d1, SEG a1, SEG a2 1 thru 3, SEGment driver outputs. SEG j, SEG h, DP, SEG d2, SEG f, SEG i, 30 thru 38 SEG b, SEG g2, SEG I SEG m, SEG e, SEG g1, SEG k, SEG c 40 thru 44 CHAR8 thru CHAR5, 14 thru 17, CHARacter driver outputs. CHAR4 thru CHAR2, CHAR1 19 thru 21, 24 V 18 Supply Ground. SS V 39 Positive Power Supply +3.0V to +3.6V. DD NC 11, 12, 22, 23 No connection. FN8587 Rev 0.00 Page 2 of 13 October 29, 2013 NC SEG c WR SEG k CHAR8 SEG g1 CHAR7 SEG e CHAR6 SEG m CHAR5 V DD V SEG l SS CHAR4 SEG g2 CHAR3 SEG b CHAR2 SEG i NC SEG f