ADC1206S040/055/070 Single 12 bits ADC, up to 40 MHz, 55 MHz or 70 MHz Rev. 03 2 July 2012 Product data sheet 1. General description The ADC1206S040/055/070 are a family of BiCMOS 12-bit Analog-to-Digital Converters (ADC) optimized for a wide range of applications such as cellular infrastructures, professional telecommunications, imaging, and digital radio. It converts the analog input signal into 12-bit binary coded digital words at a maximum sampling rate of 70 MHz. All static digital inputs (SH, CE and OTC) are Transistor-Transistor Logic (TTL) and CMOS compatible and all outputs are CMOS compatible. A sine wave clock input signal can also be used. 2. Features 12-bit resolution Sampling rate up to 70 MHz 3 dB bandwidth of 245 MHz 5 V power supplies and 3.3 V output power supply Binary or twos complement CMOS outputs In-range CMOS compatible output TTL and CMOS compatible static digital inputs TTL and CMOS compatible digital outputs Differential AC or Positive Emitter-Coupled Logic (PECL) clock input TTL compatible Power dissipation 550 mW (typical) Low analog input capacitance (typical 2 pF), no buffer amplifier required Integrated sample and hold amplifier Differential analog input External amplitude range control Voltage controlled regulator included 40 C to +85 C ambient temperature 3. Applications High-speed analog-to-digital conversion for: Cellular infrastructure Professional telecommunication Digital radio Radar Medical imaging Fixed network Cable modem Integrated Device Technology ADC1206S040/055/070 Single 12 bits ADC, up to 40 MHz, 55 MHz or 70 MHz Barcode scanner Cable Modem Termination System (CMTS)/ Data Over Cable Service Interface Specification (DOCSIS) 4. Quick reference data Table 1. Quick reference data V = V2 to V44, V3 to V4 and V41 to V40 = 4.75 V to 5.25 V CCA V = V37 to V38 and V15 to V17 = 4.75 V to 5.25 V V = V33 to V34 = 3.0 V to 3.6 V AGND CCD CCO and DGND shorted together T = 40 C to 85 C V V = 1.9 V amb I(IN)(p-p) I(INN)(p-p) V = V 1.75 V V = V 1.6 V typical values measured at V = V = 5 V and ref CCA3 I(cm) CCA3 CCA CCD V = 3.3 V, T = 25 C and C = 10 pF unless otherwise specified. CCO amb L Symbol Parameter Conditions Min Typ Max Unit V analog supply voltage 4.75 5.0 5.25 V CCA V digital supply voltage 4.75 5.0 5.25 V CCD V output supply voltage 3.0 3.3 3.6 V CCO I analog supply current - 78 87 mA CCA I digital supply current - 27 30 mA CCD I output supply current f = 20 MHz - 3 4 mA CCO clk f = 400 kHz i INL integral non-linearity f = 20 MHz - 2.6 4.5 LSB clk f = 400 kHz i DNL differential f = 20 MHz - 0.5 +1.1 0.95 LSB clk non-linearity f = 400 kHz i (no missing code guaranteed) f maximum clock ADC1206S040H 40 - - MHz clk(max) frequency ADC1206S055H 55 - - MHz ADC1206S070H 70 - - MHz P total power dissipation f = 55 MHz - 550 660 mW tot clk f = 20 MHz i 5. Ordering information Table 2. Ordering information Type number Package Sampling frequency Name Description Version (MHz) ADC1206S040H QFP44 plastic quad flat package 44 leads (lead length 1.3 mm) SOT307-2 40 body 10 10 1.75 mm ADC1206S055H QFP44 plastic quad flat package 44 leads (lead length 1.3 mm) SOT307-2 55 body 10 10 1.75 mm ADC1206S070H QFP44 plastic quad flat package 44 leads (lead length 1.3 mm) SOT307-2 70 body 10 10 1.75 mm 3ADC1206S040 055 070 3 IDT 2012. All rights reserved. Product data sheet Rev. 03 2 July 2012 2 of 31