74LVC1G32GX,125 Nexperia

74LVC1G32 Single 2-input OR gate Rev. 10 4 September 2012 Product data sheet 1. General description The 74LVC1G32 provides one 2-input OR function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall time. This device is fully specified for partial power-down applications using I . OFF The I circuitry disables the output, preventing the damaging backflow current through OFF the device when it is powered down. 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8-B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V 24 mA output drive (V =3.0 V) CC CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V Multiple package options Specified from 40 C to +85 C and 40 C to +125 C74LVC1G32 NXP Semiconductors Single 2-input OR gate 3. Ordering information Table 1. Ordering information Type number Package Temperature Name Description Version range 74LVC1G32GW 40 Cto+125 C TSSOP5 plastic thin shrink small outline package 5 leads SOT353-1 body width 1.25 mm 74LVC1G32GV 40 Cto+125 C SC-74A plastic surface-mounted package 5 leads SOT753 74LVC1G32GM 40 Cto+125 C XSON6 plastic extremely thin small outline package SOT886 no leads 6 terminals body 1 1.45 0.5 mm 74LVC1G32GF 40 C to +125 C XSON6 plastic extremely thin small outline package SOT891 no leads 6 terminals body 1 1 0.5 mm 74LVC1G32GN 40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74LVC1G32GS 40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mm 74LVC1G32GX 40 C to +125 C X2SON5 X2SON5: plastic thermal enhanced extremely thin SOT1226 small outline package no leads 5 terminals body 0.8 0.8 0.35 mm 4. Marking Table 2. Marking 1 Type number Marking code 74LVC1G32GW VG 74LVC1G32GV V32 74LVC1G32GM VG 74LVC1G32GF VG 74LVC1G32GN VG 74LVC1G32GS VG 74LVC1G32GX VG 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram B 1 1 B 1 Y 4 4 Y 2 A 2 A mna165 mna166 mna164 Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram 74LVC1G32 All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 10 4 September 2012 2 of 19