DSC2130 DSC2230 2 Low-Jitter I C/SPI Programmable LVDS Oscillator General Description Features The DSC2130 and DSC2230 series of Low RMS Phase Jitter: <1 ps (typ) programmable, high-performance LVDS High Stability: 10, 25, 50 ppm oscillators utilizes a proven silicon MEMS technology to provide excellent jitter and Wide Temperature Range stability while incorporating high output o Industrial: -40 to 85 C frequency flexibility. DSC2130 and DSC2230 o Ext. commercial: -20 to 70 C allow the user to modify the output 2 High Supply Noise Rejection: -50 dBc frequency using I C or SPI interface, 2 respectively. User can also select from two I C/SPI Programmable Output Freq pre-programmed default output frequencies Short Lead Times: 2 Weeks using the control pin. Wide Freq. Range: DSC2130 and DSC2230 are packaged in 14- o LVDS Output: 2.3 to 460 MHz pin 3.2x2.5 mm QFN packages and available Miniature Footprint of 3.2x2.5mm in temperature grades from Ext. Commercial to industrial. Excellent Shock & Vibration Immunity o Qualified to MIL-STD-883 High Reliability Block Diagram o 20x better MTF than quartz oscillators Supply Range of 2.25 to 3.6 V Lead Free & RoHS Compliant Applications Consumer Electronics Storage Area Networks o SATA, SAS, Fibre Channel Passive Optical Networks o EPON, 10G-EPON, GPON, 10G-PON Ethernet 2 Pin DSC2130 (I C) DSC2230 (SPI) o 1G, 10GBASE-T/KR/LR/SR, and FCoE 3 NC SCLK HD/SD/SDI Video & Surveillance 5 SDA MOSI PCI Express 6 SCL MISO 7 CS bar SS DSC2130 DSC2230 Page 1 MK-Q-B-P-D-12050106 2 DSC2130 DSC2230 Low-Jitter I C/SPI Programmable LVDS Oscillator Pin Description Pin No. Pin Name Pin Type Description 1 Enable I Enables outputs when high and disables when low 2 NC NA Leave unconnected or grounded NC NA DSC2130: Leave unconnected or grounded 3 SCLK I DSC2230: Serial clock from master 4 GND Power Ground 2 SDA I DSC2130: I C Serial Data 5 MOSI DSC2230: SPI Serial Data from Master to Slave 2 SCL I DSC2130: I C Serial Clock 6 MISO O DSC2230: SPI Serial Data from Slave to Master 2 CS bar I DSC2130: I C Chip Select (Active Low) 7 SS I DSC2230: SPI Slave Select (Active Low) 8 Output1+ O Positive LVDS Output 9 Output1- O Negative LVDS Output 10 NC NA Leave unconnected or grounded 11 NC NA Leave unconnected or grounded 12 VDD2 Power Power Supply 13 VDD Power Power Supply 14 FS I Default output clock frequency bit Operational Description The DSC2130/2230 is a LVDS oscillator pin (FS) selects the initial frequency. Once consisting of a MEMS resonator and a support the device is powered up, a new output PLL IC. The LVDS output is generated frequency can be programmed. Programming through independent 8-bit programmable details are provided in the Programming dividers from the output of the internal PLL. Guide. Standard default frequencies are described in the following sections. Discera DSC2130/2230 allows for easy programming supports customer defined versions of the 2 of the output frequencies using I C/SPI DSC2130/2230. interface. Upon power-up, the initial output frequency is controlled by an internal pre- When Enable (pin 1) is floated or connected to programmed memory (OTP). This memory VDD, the DSC2130/2230 is in operational stores all coefficients required by the PLL for mode. Driving Enable to ground will disable two different default frequencies. The control both output drivers (hi-impedance mode). DSC2130 DSC2230 Page 2 MK-Q-B-P-D-12050106