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DSPIC33FJ128MC804-E/ML

DSPIC33FJ128MC804-E/ML electronic component of Microchip

Datasheet
Microchip Technology Digital Signal Processors & Controllers - DSP, DSC 16B DSC 44LD128KB DMA 40MIPS

Manufacturer: Microchip
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Price (USD)

1: USD 9.085 ea
Line Total: USD 9.09

1381 - Global Stock
Ships to you between
Thu. 02 May to Mon. 06 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
1381 - Global Stock


Ships to you between Thu. 02 May to Mon. 06 May

MOQ : 1
Multiples : 1
1 : USD 9.085
10 : USD 9.062
25 : USD 8.487
90 : USD 8.4065
270 : USD 8.4065

27 - Global Stock


Ships to you between Fri. 26 Apr to Thu. 02 May

MOQ : 28
Multiples : 28
28 : USD 20.9753

     
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dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 and dsPIC33FJ128MCX02/X04 16-bit Digital Signal Controllers (up to 128 KB Flash and 16K SRAM) with Motor Control PWM and Advanced Analog Operating Conditions System Peripherals 3.0V to 3.6V, -40C to +150C, DC to 20 MIPS Cyclic Redundancy Check (CRC) module 3.0V to 3.6V, -40C to +125C, DC to 40 MIPS 16-bit dual channel 100 ksps Audio DAC Up to five 16-bit and up to two 32-bit Timers/Counters Clock Management Up to four Input Capture (IC) modules 2% internal oscillator Up to four Output Compare (OC) modules Programmable PLL and oscillator clock sources Up to two Quadrature Encoder Interface (QEI) modules Fail-Safe Clock Monitor (FSCM) Real-Time Clock and Calendar (RTCC) module Independent Watchdog Timer Communication Interfaces Low-power management modes Fast wake-up and start-up Parallel Master Port (PMP) Two UART modules (10 Mbps) Core Performance - Supports LIN 2.0 protocols Up to 40 MIPS 16-bit dsPIC33F CPU - RS-232, RS-485, and IrDA support Two 40 bit wide accumulators Two 4-wire SPI modules (15 Mbps) Single-cycle (MAC/MPY) with dual data fetch Enhanced CAN (ECAN) module (1 Mbaud) with 2.0B Single-cycle MUL plus hardware divide support 2 I C module (100K, 400K and 1Mbaud) with SMbus Motor Control PWM support Up to four PWM generators with eight outputs Direct Memory Access (DMA) Dead Time for rising and falling edges 25 ns PWM resolution 8-channel hardware DMA with no CPU stalls or PWM support for Motor Control: BLDC, PMSM, ACIM, overhead and SRM UART, SPI, ADC, ECAN, IC, OC, INT0 Programmable Fault inputs Qualification and Class B Support Flexible trigger for ADC conversions and configurations AEC-Q100 REVG (Grade 0 -40C to +150C) Advanced Analog Features Class B Safety Library, IEC 60730, VDE certified 10/12-bit ADC with 1.1Msps/500 ksps conversion rate: Debugger Development Support - Up to nine ADC input channels and four S&H In-circuit and in-application programming - Flexible/Independent trigger sources Two program breakpoints 150 ns Comparators: Trace and run-time watch - Up to two Analog Comparator modules - 4-bit DAC with two ranges for Analog Comparators Input/Output Software remappable pin functions 5V-tolerant pins Selectable open drain and internal pull-ups Up to 5 mA overvoltage clamp current/pin Multiple external interrupts Packages Type SPDIP (300 ml) SOIC QFN-S QFN TQFP Pin Count 28 28 28 44 44 I/O Pins 21 21 21 35 35 Contact Lead/Pitch .100 1.27 0.65 0.65 0.80 Dimensions .285x.135x1.365 7.50x2.05x17.9 6x6x0.9 8x8x0.9 10x10x1 Note: All dimensions are in millimeters (mm) unless specified. 2007-2012 Microchip Technology Inc. DS70291G-page 1dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04 dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04 PRODUCT FAMILIES The device names, pin counts, memory sizes, and peripheral availability of each device are listed in Table 1. The pages that follow show their pinout diagrams. TABLE 1: dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04 CONTROLLER FAMILIES Remappable Peripheral Device dsPIC33FJ128MC804 44 128 16 26 5 4 4 6, 2 2 2 2 1 11 1 9 1 1/1 11 35 QFN 3 TQFP dsPIC33FJ128MC802 28 128 16 16 5 4 4 6, 2 2 2 2 1 3 1 1 1 6 0 1/0 2 21 SPDIP SOIC QFN-S dsPIC33FJ128MC204 44 128 8 26 5 4 4 6, 2 2 2 2 0 3 1 1 1 9 0 1/1 11 35 QFN TQFP dsPIC33FJ128MC202 28 128 8 16 5 4 4 6, 2 2 2 2 0 3 1 1 1 6 0 1/0 2 21 SPDIP SOIC QFN-S dsPIC33FJ64MC804 44 64 16 26 5 4 4 6, 2 2 2 2 1 3 1 1 1 9 1 1/1 11 35 QFN TQFP dsPIC33FJ64MC802 28 64 16 16 5 4 4 6, 2 2 2 2 1 3 1 1 1 6 0 1/0 2 21 SPDIP SOIC QFN-S dsPIC33FJ64MC204 44 64 8 26 5 4 4 6, 2 2 2 2 0 3 1 1 1 9 0 1/1 11 35 QFN TQFP dsPIC33FJ64MC202 28 64 8 16 5 4 4 6, 2 2 2 2 0 3 1 1 1 6 0 1/0 2 21 SPDIP SOIC QFN-S dsPIC33FJ32MC304 44 32 4 26 5 4 4 6, 2 2 2 2 0 3 1 1 1 9 0 1/1 11 35 QFN TQFP dsPIC33FJ32MC302 28 32 4 16 5 4 4 6, 2 2 2 2 0 3 1 1 1 6 0 1/0 2 21 SPDIP SOIC QFN-S Note 1: RAM size is inclusive of 2 Kbytes of DMA RAM for all devices except dsPIC33FJ32MC302/304, which include 1 Kbyte of DMA RAM. 2: Only four out of five timers are remappable. 3: Only PWM fault pins are remappable. 4: Only two out of three interrupts are remappable. DS70291G-page 2 2007-2012 Microchip Technology Inc. Pins Program Flash Memory (Kbyte) (1) RAM (Kbyte) Remappable Pins (2) 16-bit Timer Input Capture Output Compare Standard PWM Motor Control PWM (3) (Channels) Quadrature Encoder Interface UART SPI ECAN (4) External Interrupts RTCC 2 I C CRC Generator 10-bit/12-bit ADC (Channels) 6-pin 16-bit DAC Analog Comparator (2 Channels/Voltage Regulator) 8-bit Parallel Master Port (Address Lines) I/O Pins Packages

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8542.31.00 52 No ..CMOS and MOS Microprocessors (MPU), Microcontrollers (MCU) and Digital Signal Processors (DSP)

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