Product Information

AT17LV010-10CU

AT17LV010-10CU electronic component of Microchip

Datasheet
FPGA - Configuration Memory CONFIG SERIAL EEPROM 1M 3.3V-10MHZ

Manufacturer: Microchip
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1: USD 18.354 ea
Line Total: USD 18.354

161 - Global Stock
Ships to you between
Wed. 10 Apr to Fri. 12 Apr
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AT17LV010-10CU
Microchip

1 : USD 18.032
25 : USD 18.032
100 : USD 18.032

161 - Global Stock


Ships to you between Wed. 10 Apr to Fri. 12 Apr

MOQ : 1
Multiples : 1

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AT17LV010-10CU
Microchip

1 : USD 18.354
25 : USD 17.9285
83 : USD 17.273

64 - Global Stock


Ships to you between Thu. 04 Apr to Wed. 10 Apr

MOQ : 1
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AT17LV010-10CU
Microchip

1 : USD 17.6033

456 - Global Stock


Ships to you between Thu. 04 Apr to Wed. 10 Apr

MOQ : 1
Multiples : 1

Stock Image

AT17LV010-10CU
Microchip

1 : USD 18.032

     
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(1) (1) AT17LV65 , AT17LV128 , AT17LV256, AT17LV512, AT17LV010, AT17LV002, AT17LV040 FPGA Configuration EEPROM Memory Note 1. 3.3V and 5.0V System Support AT17LV65 and AT17LV128 are Not Recommended for New Designs (NRND) and DATASHEET are Replaced by AT17LV256. Features EE Programmable Serial Memories Designed to Store Configuration Programs for Field Programmable Gate Arrays (FPGAs) (1) 65,536 x 1-bit 524,288 x 1-bit 2,097,152 x 1-bit (1) 131,072 x 1-bit 1,048,576 x 1-bit 4,194,304 x 1-bit 262,144 x 1-bit Supports both 3.3V and 5.0V Operating Voltage Applications In-System Programmable (ISP) via 2-wire Bus Simple Interface to SRAM FPGAs Compatible with the Atmel AT6000, AT40K and AT94K Devices, Altera FLEX , APEX Devices, ORCA , Xilinx XC3000, XC4000, XC5200, Spartan , Virtex FPGAs Cascadable Read-back to Support Additional Configurations or Higher-density Arrays Very Low-power CMOS EEPROM Process Programmable Reset Polarity Available in 6mm x 6mm x 1mm 8-lead LAP (Pin-compatible with 8-lead SOIC Package), 8-lead PDIP, 8-lead SOIC, 20-lead PLCC, 20-lead SOIC and 44-lead TQFP Packages Emulation of the Atmel AT24CXXX Serial EEPROMs Low-power Standby Mode High-reliability Endurance: 100,000 Write Cycles Data Retention: 90 Years for Industrial Parts (at 85C) Green (Pb/Halide-free/RoHS Compliant) Package Options Available Description The AT17LV FPGA Configuration EEPROMs (Configurators) provide an easy-to- use, cost-effective configuration memory solution for Field Programmable Gate Arrays. The AT17LV devices are packaged in the 8-lead LAP, 8-lead PDIP, 8-lead SOIC, 20-lead PLCC, 20-lead SOIC and 44-lead TQFP options(Table 1). The AT17LV Configurators use a simple serial-access procedure to configure one or more FPGA devices. The user can select the polarity of the reset function during programming. These devices also support a write protection mechanism within its programming mode. Atmel-2321J-FPGA-AT17LV65-128-256-512-010-002-040-Datasheet 102014The AT17LV configurators can be programmed with industry-standard programmers, the Atmel ATDH2200E Programming Kit, or the Atmel ATDH2225 ISP Cable. Table 1. AT17LV Packages (4) Package AT17LV65/128/256 AT17LV512/010 AT17LV002 AT17LV040 (3) 8-lead LAP Yes Yes Yes 8-lead PDIP Yes Yes (1) (1) (3) 8-lead SOIC Yes Use 8-lead LAP Use 8-lead LAP 20-lead PLCC Yes Yes Yes (2) (2) 20-lead SOIC Yes Yes 44-lead TQFP Yes Yes Notes: 1. The 8-lead LAP package has the same footprint as the 8-lead SOIC. Since an 8-lead SOIC package is not available for the AT17LV512/010/002 devices, it is possible to use an 8-lead LAP package instead. 2. The pinout for the AT17LV65 (NRND), AT17LV128 (NRND), and AT17LV256 is not pin-for-pin compatible with the AT17LV512/010/002 devices. 3. Refer to the AT17F datasheet which is available on the Atmel website. 4. The AT17LV65 and AT17LV128 are not recommended for new designs (NRND). 2 AT17LV65/128/256/512/010/002/040 DATASHEET Atmel-2321J-FPGA-AT17LV65-128-256-512-010-002-040-Datasheet 102014

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8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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